“Samsung is applying AI across our operations to develop foundational technologies that make AI more intuitive and seamless,” said Young Hyun Jun, Vice Chairman and CEO of Samsung Electronics, in his opening remarks. “This year’s Samsung AI Forum brings together leading experts from industry and academia to discuss how AI is transforming society and industry, and to share insights in what we expect will be a meaningful exchange of ideas.”

This year’s forum features keynote lectures from world-renowned AI scholars; including Yoshua Bengio, Professor at the University of Montreal and a pioneer in deep learning; as well as Stefano Ermon, Professor at Stanford University and Co-founder of the startup Inception, who spearheaded the development of diffusion-based language model (DLM).

Day One: Global Scholars Explore the AI Semiconductor Future

Samsung’s Device Solutions (DS) Division hosted the first day of the forum under the theme “Vertical AI Strategies and Vision for the Semiconductor Industry,” near Samsung’s semiconductor site in Yongin, Korea.

Professor Bengio delivered a keynote address outlining the far-reaching risks of today’s AI models, including their ability to bypass human control and the potential for misuse. As a safeguard, he introduced Scientist AI, a new model designed to help mitigate such concerns.

“Unlike models built to mimic or please humans, Scientist AI focuses on providing truthful answers grounded in verified facts and data,” said Professor Bengio, highlighting the model’s potential to enhance AI safety and accelerate scientific discovery. He also shared his latest research findings on AI for materials development in the keynote.

Amit Gupta, Senior Vice President of Siemens EDA, led a session titled, “The Future of AI-Driven Electronic Design.” During his presentation, he emphasized the importance of integrating AI into electronic design automation (EDA) tools and noted that end-to-end systems spanning the entire workflow will be key to unlocking AI’s full potential.

Technical sessions featuring Yong Ho Song, Executive Vice President and Head of the DS Division’s AI Center, Professor Seokhyung Kang of Pohang University of Science and Technology (POSTECH) and Professor Il-Chul Moon of Korea Advanced Institute of Science and Technology (KAIST) followed. Each speaker shared recent research developments in AI applications for semiconductor design and manufacturing, while also offering perspectives on how the field is evolving.

“AI is already an essential tool in chip design and software development,” said EVP Song. “As semiconductor manufacturing grows more complex, we expect AI to help address the technical challenges that arise.”

The forum also recognized three winners of the Samsung AI Researcher of the Year award: Professor Nicolas Papernot of the University of Toronto, Professor Rose Yu of the University of California San Diego and Professor Lerrel Pinto of New York University. All the award recipients were invited to present their work and share insights from their latest research.

Day Two: Focusing on the Era of Agentic AI and Boosting Productivity

Day two of the forum will be held online by Samsung’s Device eXperience (DX) Division and streamed live on Samsung Developer’s YouTube channel under the theme “Generative to Agentic AI.”¹

“Generative AI has already become an essential tool across daily life and industries,” said Paul (Kyungwhoon) Cheun, CTO of the DX Division at Samsung Electronics and Head of Samsung Research. “As we enter the era of Agentic AI, Samsung will continue to focus on developing AI technologies that provide users with tangible benefits.”

The second day includes keynote speeches from Joseph E. Gonzalez, Professor at UC Berkeley and a leading researcher in language models and AI agents; Subbarao Kambhampati, Professor at Arizona State University and a world authority in AI planning and decision-making; and Stefano Ermon, Professor at Stanford University and Co-founder of Inception.

Professor Gonzalez will present his research on enhancing the agentic capabilities of large language model (LLM)-based systems. In particular, he will introduce the sleep-time compute paradigm, which enables agents to use idle interaction intervals to reason, learn and plan.

Professor Kambhampati will share his research on large reasoning models (LRMs) aimed at addressing the limitations of LLMs. He will point out that while current models excel at text generation, they remain limited in factual accuracy, planning and complex reasoning — highlighting key challenges such as ensuring answer guarantees, enabling context-adaptive computation, and providing interpretations of intermediate reasoning steps.

Professor Ermon will introduce diffusion language model, which applies diffusion models — widely used for image, video, and audio generation — into the language domain. This approach aims to overcome the limitations of traditional sequential text generation methods and propose a more efficient paradigm for language models.

In the technical sessions, Samsung Research representatives will present their latest developments, including:

• Camera AI technology for automatic color temperature adjustment
• Knowledge distillation-based methods for more efficient training of LLMs and their applications
• On-device AI technologies designed to bring LLMs to consumer electronics such as smartphones and TVs
• Automatic dubbing technology that generates voiceovers in the original speaker’s voice
• Deep dive technology that uses multi-agent systems to analyze and automatically generate various reports
• Document AI technologies that automatically convert diverse document formats into structure data for LLMs and agent systems
• An on-device AI studio for developers that shortens the development cycle of generative AI models

¹ Intelligent systems capable of making autonomous decisions and carrying out tasks on their own.

The research was led by Samsung Advanced Institute of Technology (SAIT) in close collaboration with Samsung Electronics Foundry Business and Semiconductor R&D Center. The first author of the paper, Dr. Seungchul Jung, Staff Researcher at SAIT, and the co-corresponding authors Dr. Donhee Ham, Fellow of SAIT and Professor of Harvard University and Dr. Sang Joon Kim, Vice President of Technology at SAIT, spearheaded the research.

In the standard computer architecture, data is stored in memory chips and data computing is executed in separate processor chips.

In contrast, in-memory computing is a new computing paradigm that seeks to perform both data storage and data computing in a memory network. Since this scheme can process a large amount of data stored within the memory network itself without having to move the data, and also because the data processing in the memory network is executed in a highly parallel manner, power consumption is substantially reduced. In-memory computing has thus emerged as one of the promising technologies to realize next-generation low-power AI semiconductor chips.

For this reason, research on in-memory computing has been intensely pursued worldwide. Non-volatile memories, in particular RRAM (Resistive Random Access Memory) and PRAM (Phase-change Random Access Memory), have been actively used for demonstrating in-memory computing. By contrast, it has so far been difficult to use MRAM ─ another type of non-volatile memory ─ for in-memory computing despite MRAM’s merits such as operation speed, endurance and large-scale production. This difficulty stems from the low resistance of MRAM, due to which MRAM cannot enjoy the power reduction advantage when used in the standard in-memory computing architecture.

(From left) Dr. Donhee Ham, Fellow of SAIT and Professor of Harvard University, Dr. Seungchul Jung, Staff Researcher at SAIT and Dr. Sang Joon Kim, Vice President of Technology at SAIT

The Samsung Electronics researchers have provided a solution to this issue by an architectural innovation. Concretely, they succeeded in developing an MRAM array chip that demonstrates in-memory computing, by replacing the standard, ‘current-sum’ in-memory computing architecture with a new, ‘resistance sum’ in-memory computing architecture, which addresses the problem of small resistances of individual MRAM devices.

Samsung’s research team subsequently tested the performance of this MRAM in-memory computing chip by running it to perform AI computing. The chip achieved an accuracy of 98% in classification of hand-written digits and a 93% accuracy in detecting faces from scenes.

By ushering MRAM ─ the memory which has already reached commercial-scale production embedded in the system semiconductor fabrication ─ into the realm of in-memory computing, this work expands the frontier of the next-generation low-power AI chip technologies.

The researchers have also suggested that not only can this new MRAM chip be used for in-memory computing, but it also can serve as a platform to download biological neuronal networks. This is along the line of the neuromorphic electronics vision that Samsung’s researchers recently put forward in a perspective paper published in the September 2021 issue of the journal Nature Electronics.

“In-memory computing draws similarity to the brain in the sense that in the brain, computing also occurs within the network of biological memories, or synapses, the points where neurons touch one another,” said Dr. Seungchul Jung, the first author of the paper. “In fact, while the computing performed by our MRAM network for now has a different purpose from the computing performed by the brain, such solid-state memory network may in the future be used as a platform to mimic the brain by modeling the brain’s synapse connectivity.”

As highlighted in this work, by building on its leading memory technology and merging it with system semiconductor technology, Samsung plans to continue to expand its leadership in next-generation computing and AI semiconductors.

Envisioned by the leading engineers and scholars from Samsung and Harvard University, the insight was published as a Perspective paper, titled ‘Neuromorphic electronics based on copying and pasting the brain’, by Nature Electronics. Donhee Ham, Fellow of Samsung Advanced Institute of Technology (SAIT) and Professor of Harvard University, Professor Hongkun Park of Harvard University, Sungwoo Hwang, President and CEO of Samsung SDS and former Head of SAIT, and Kinam Kim, Vice Chairman and CEO of Samsung Electronics are the co-corresponding authors.

Image of rat neurons on CNEA (CMOS nanoelectrode array).

The essence of the vision put forward by the authors is best summed up by the two words, ‘copy’ and ‘paste’. The paper suggests a way to copy the brain’s neuronal connection map using a breakthrough nanoelectrode array developed by Dr. Ham and Dr. Park, and to paste this map onto a high-density three-dimensional network of solid-state memories, the technology for which Samsung has been a world leader.

Through this copy and paste approach, the authors envision to create a memory chip that approximates the unique computing traits of the brain – low power, facile learning, adaptation to environment, and even autonomy and cognition – that have been beyond the reach of current technology.

The brain is made up of a large number of neurons, and their wiring map is responsible for the brain’s functions. Thus the knowledge of the map is the key to reverse engineering the brain.

While the original goal of neuromorphic engineering, launched in the 1980s, was to mimic such structure and function of the neuronal networks on a silicon chip, it proved difficult because, even until now, little is known of how the large number of neurons are wired together to create the brain’s higher functions. Thus, the goal of neuromorphic engineering has been eased to designing a chip ‘inspired’ by the brain rather than rigorously mimicking it.

This paper suggests a way to return to the original neuromorphic goal of the brain reverse engineering. The nanoelectrode array can effectively enter a large number of neurons so it can record their electrical signals with high sensitivity. These massively parallel intracellular recordings inform the neuronal wiring map, indicating where neurons connect with one another and how strong these connections are. Hence from these telltale recordings, the neuronal wiring map can be extracted, or ‘copied’.

The copied neuronal map can then be ‘pasted’ to a network of non-volatile memories – such as commercial flash memories that are used in our everyday life in solid-state drives (SSD), or ‘new’ memories such as resistive random access memories (RRAM) – by programming each memory so that its conductance represents the strength of each neuronal connection in the copied map.

(From the left) Donhee Ham, Fellow of Samsung Advanced Institute of Technology (SAIT) and Professor of Harvard University, Hongkun Park, Professor of Harvard University, Sungwoo Hwang, President and CEO of Samsung SDS (former Head of SAIT) and Kinam Kim, Vice Chairman and CEO of Samsung Electronics, the co-corresponding authors.

The paper takes a step further and suggests a strategy to rapidly paste the neuronal wiring map onto a memory network. A network of specially-engineered non-volatile memories can learn and express the neuronal connection map, when directly driven by the intracellularly recorded signals. This is a scheme that directly downloads the brain’s neuronal connection map onto the memory chip.

Since the human brain has an estimated 100 billion or so neurons, and a thousand or so times more synaptic connections, the ultimate neuromorphic chip will require 100 trillion or so memories. Integrating such vast number of memories on a single chip would be made possible by 3D integration of memories, the technology led by Samsung that opened up a new era for memory industry.

Leveraging its leading experience in chip manufacturing, Samsung is planning to continue its research into neuromorphic engineering, in order to extend Samsung’s leadership in the field of next generation AI semiconductors.

“The vision we present is highly ambitious,” said Dr. Ham. “But working toward such a heroic goal will push the boundaries of machine intelligence, neuroscience, and semiconductor technology.”