“We are excited to deliver the industry’s first 9th-gen V-NAND which will bring future applications leaps forward. In order to address the evolving needs for NAND flash solutions, Samsung has pushed the boundaries in cell architecture and operational scheme for our next-generation product,” said SungHoi Hur, Head of Flash Product & Technology of the Memory Business at Samsung Electronics. “Through our latest V-NAND, Samsung will continue to set the trend for the high-performance, high-density solid-state drive (SSD) market that meets the needs for the coming AI generation.”

With the industry’s smallest cell size and thinnest mold, Samsung improved the bit density of the 9th-generation V-NAND by about 50% compared to the 8th-generation V-NAND. New innovations such as cell interference avoidance and cell life extension have been applied to enhance product quality and reliability, while eliminating dummy channel holes has significantly reduced the planar area of the memory cells.

In addition, Samsung’s advanced “channel hole etching” technology showcases the company’s leadership in process capabilities. This technology creates electron pathways by stacking mold layers and maximizes fabrication productivity as it enables simultaneous drilling of the industry’s highest cell layer count in a double-stack structure. As the number of cell layers increase, the ability to pierce through higher cell numbers becomes essential, demanding more sophisticated etching techniques.

The 9th-generation V-NAND is equipped with the next-generation NAND flash interface, “Toggle 5.1,” which supports increased data input/output speeds by 33% to up to 3.2 gigabits-per-second (Gbps). Along with this new interface, Samsung plans to solidify its position within the high-performance SSD market by expanding support for PCIe 5.0.

Power consumption has also been improved by 10% with advancements in low-power design, compared to the previous generation. As reducing energy usage and carbon emissions becomes vital for customers, Samsung’s 9th-generation V-NAND is expected to be an optimal solution for future applications.

Samsung has started mass production for the 1Tb TLC 9th-generation V-NAND this month, followed by the quad-level cell (QLC) model in the second half of this year.

“By bringing cutting-edge 3D memory technology to volume production, we are able to introduce timely memory lineups that significantly raise the bar for speed and power efficiency,” said Kye Hyun Kyung, executive vice president of Solution Product & Development at Samsung Electronics. “With faster development cycles for next-generation V-NAND products, we plan to rapidly expand the markets for our high-speed, high-capacity 512Gb V-NAND-based solutions.”

The Only Single-stack 3D Memory Die With a 100+ Layer Design

Samsung’s sixth-generation V-NAND features the industry’s fastest data transfer rate, capitalizing on the company’s distinct manufacturing edge that is taking 3D memory to new heights.

Utilizing Samsung’s unique ‘channel hole etching’ technology, the new V-NAND adds around 40-percent more cells to the previous 9x-layer single-stack structure. This is achieved by building an electrically conductive mold stack comprised of 136 layers, then vertically piercing cylindrical holes from top to bottom, creating uniform 3D charge trap flash (CTF) cells.

As the mold stack in each cell area increases in height, NAND flash chips tend to become more vulnerable to errors and read latencies. To overcome such limitations, Samsung has incorporated a speed-optimized circuit design that allows it to achieve the fastest data transfer speed, at below 450 microseconds (μs) for write operations and below 45μs for reads. Compared to the previous generation, this represents a more than 10-percent improvement in performance, while power consumption is reduced by more than 15 percent.

Thanks to this speed-optimized design, Samsung will be able to offer next-generation V-NAND solutions with over 300 layers simply by mounting three of the current stacks, without compromising chip performance or reliability.

In addition, the number of channel holes required to create a 256Gb chip density has decreased to 670 million holes from over 930 million with the previous generation, enabling reduced chip sizes and less process steps. This brings a more than 20-percent improvement in manufacturing productivity.

Leveraging the high-speed and low-power features, Samsung plans to not only broaden the reach of its 3D V-NAND into areas like next-generation mobile devices and enterprise servers, but also into the automotive market where high reliability is extremely critical.

Following today’s introduction of the 250GB SSD, Samsung plans to offer 512Gb three-bit V-NAND SSD and eUFS in the second half of this year. The company also expects to expand production of higher-speed and greater-capacity sixth-generation V-NAND solutions at its Pyeongtaek (Korea) campus starting next year to better meet demand from global customers.

Reference: Samsung V-NAND Mass Production Timeline