As 1z-nm becomes the industry’s smallest memory process node, Samsung is now primed to respond to increasing market demands with its new DDR4 DRAM that has more than 20-percent higher manufacturing productivity compared to the previous 1y-nm version.

Mass production of the 1z-nm 8Gb DDR4 will begin within the second half of this year to accommodate next-generation enterprise servers and high-end PCs expected to be launched in 2020.

“Our commitment to break through the biggest challenges in technology has always driven us toward greater innovation. We are pleased to have laid the groundwork again for stable production of next-generation DRAM that ensures the highest performance and energy efficiency,” said Jung-bae Lee, executive vice president of DRAM product & technology, Samsung Electronics. “As we build out our 1z-nm DRAM lineup, Samsung is aiming to support its global customers in their deployment of cutting-edge systems and enabling proliferation of the premium memory market.”

Samsung’s development of the 1z-nm DRAM paves the way for an accelerated global IT transition to next-generation DRAM interfaces such as DDR5, LPDDR5 and GDDR6 that will power a wave of future digital innovation. Subsequent 1z-nm products with higher capacities and performance will allow Samsung to strengthen its business competitiveness and solidify its leadership in the premium DRAM market for applications that include servers, graphics and mobile devices.

Following a full validation with a CPU manufacturer for eight-gigabyte (GB) DDR4 modules, Samsung will be actively collaborating with global customers to deliver an array of upcoming memory solutions.

In line with current industry needs, Samsung plans to increase the portion of its main memory production at its Pyeongtaek site, while working with its global IT clients to meet the rising demand for state-of-the-art DRAM products.

Using the new memory solution, PC manufacturers can build faster top-of-the-line gaming-oriented laptops with longer battery life at capacities exceeding conventional mobile workstations, while maintaining existing PC configurations.

“Samsung’s 32GB DDR4 DRAM modules will deliver gaming experiences on laptops more powerful and immersive than ever before,” said Sewon Chun, senior vice president of memory marketing at Samsung Electronics. “We will continue to provide the most advanced DRAM portfolios with enhanced speed and capacity for all key market segments including premium laptops and desktops.”

Compared to Samsung’s 16GB SoDIMM based on 20nm-class 8-gigabit (Gb) DDR4, which was introduced in 2014, the new 32GB module doubles the capacity while being 11 percent faster and approximately 39 percent more energy efficient.

With a total of 16 of Samsung’s newest 16-gigabit (Gb) DDR4 DRAM chips (eight chips each mounted on the front and back), the 32GB SoDIMM allows gaming laptops to reach speeds up to 2,666 megabits-per-second (Mbps).

A 64GB laptop configured with two 32GB DDR4 modules consumes less than 4.6 watts (W) in active mode and less than 1.4W when idle. This reduces power usage by approximately 39 percent and over 25 percent, respectively, compared to today’s leading gaming-oriented laptops, which are equipped with 16GB modules.

Samsung has begun to aggressively expand its offering of the industry’s largest 10nm-class DRAM lineup (16Gb LPDDR4, 16Gb GDDR5, and 16Gb DDR4), which will usher in a new era of 16Gb DRAM in the mobile, graphics, PC and server segments, and subsequently in other markets such as supercomputers and automotive systems.

*Editor’s Note: 10nm-class is a process node between 10 and 19 nanometers

Samsung Electronics, the world leader in advanced memory technology, announced today that it has begun mass producing the industry’s first 10-nanometer (nm) class* , 8-gigabit (Gb) DDR4 (double-data-rate-4) DRAM chips and the modules derived from them. DDR4 is quickly becoming the most widely produced memory for personal computers and IT networks in the world, and Samsung’s latest advancement will help to accelerate the industry-wide shift to advanced DDR4 products.

Samsung opened the door to “10nm-class DRAM” for the first time in the industry after overcoming technical challenges in DRAM scaling. These challenges were mastered using currently available ArF (argon fluoride) immersion lithography, free from the use of EUV (extreme ultra violet) equipment.

Samsung’s roll-out of the 10nm-class (1x) DRAM marks yet another milestone for the company after it first mass produced 20-nanometer (nm)** 4Gb DDR3 DRAM in 2014.

“Samsung’s 10nm-class DRAM will enable the highest level of investment efficiency in IT systems, thereby becoming a new growth engine for the global memory industry,” said Young-Hyun Jun, President of Memory Business, Samsung Electronics. “In the near future, we will also launch next-generation, 10nm-class mobile DRAM products with high densities to help mobile manufacturers develop even more innovative products that add to the convenience of mobile device users.”

Samsung’s leading-edge 10nm-class 8Gb DDR4 DRAM significantly improves the wafer productivity of 20nm 8Gb DDR4 DRAM by more than 30 percent.

The new DRAM supports a data transfer rate of 3,200 megabits per second (Mbps), which is more than 30 percent faster than the 2,400Mbps rate of 20nm DDR4 DRAM. Also, new modules produced from the 10nm-class DRAM chips consume 10 to 20 percent less power, compared to their 20nm-process-based equivalents, which will improve the design efficiency of next-generation, high-performance computing (HPC) systems and other large enterprise networks, as well as being used for the PC and mainstream server markets.

The industry-first 10nm-class DRAM is the result of Samsung’s advanced memory design and manufacturing technology integration. To achieve an extremely high level of DRAM scalability, Samsung has taken its technological innovation one step further than what was used for 20nm DRAM. Key technology developments include improvements in proprietary cell design technology, QPT (quadruple patterning technology***) lithography, and ultra-thin dielectric layer**** deposition.

Unlike NAND flash memory, in which a single cell consists of only a transistor, each DRAM cell requires a capacitor and a transistor that are linked together, usually with the capacitor being placed on top of the area where the transistor rests. In the case of the new 10nm-class DRAM, another level of difficulty is added because they have to stack very narrow cylinder-shaped capacitors that store large electric charges, on top of a few dozen nanometer-wide transistors, creating more than eight billion cells.

Samsung successfully created the new 10nm-class cell structure by utilizing a proprietary circuit design technology and quadruple patterning lithography. Through quadruple patterning, which enables use of existing photolithography equipment, Samsung also built the core technological foundation for the development of the next-generation 10nm-class DRAM (1y).

In addition, the use of a refined dielectric layer deposition technology enabled further performance improvements in the new 10nm-class DRAM. Samsung engineers applied ultra-thin dielectric layers with unprecedented uniformity to a thickness of a mere single-digit angstrom (one 10 billionth of a meter) on cell capacitors, resulting in sufficient capacitance for higher cell performance.

Based on its advancements with the new 10nm-class DDR4 DRAM, Samsung expects to also introduce a 10nm-class mobile DRAM solution with high density and speed later this year, which will further solidify its leadership in the ultra-HD smartphone market.

While introducing a wide array of 10nm-class DDR4 modules with capacities ranging from 4GB for notebook PCs to 128GB for enterprise servers, Samsung will be extending its 20nm DRAM line-up with its new 10nm-class DRAM portfolio throughout the year.

*10nm-class denotes a process technology node somewhere between 10 and 19 nanometers, while 20nm-class means a process technology node somewhere between 20 and 29 nanometers.

**Samsung’s achievements in 2014 were about DDR3 and DDR4 products that used 20-nanometer process technology, which should be distinguished from 20nm-class process technology. The company’s first 20nm-class DRAM product actually came out three years earlier. In 2011, Samsung initiated production of 20nm-class 2Gb DDR3, and the year after, started producing a full line-up of DRAM product family that included 20nm-class 4Gb DDR3 and 4Gb LPDDR2 based packages and modules.

***Quadruple patterning is a multiple patterning technology that is used in high-end integrated circuit (IC) manufacturing, especially in the photolithography process. There are many different ways of deploying a multiple patterning technology, but the common goal is to extend the patterning resolution and enhance the feature density beyond that of conventional lithography.

****Dielectric materials are characterized by very low electrical conductivity in which an electric field can be sustained with minimal leakage. In semiconductor manufacturing, dielectric materials are used in many different steps. A major application of dielectric materials in Samsung’s 10nm-class DRAM manufacturing is to insulate capacitors and prevent electric leakage, which will result in a significant increase in capacitance and higher cell performance.

“By mass producing next-generation HBM2 DRAM, we can contribute much more to the rapid adoption of next-generation HPC systems by global IT companies,” said Sewon Chun, senior vice president, Memory Marketing, Samsung Electronics. “Also, in using our 3D memory technology here, we can more proactively cope with the multifaceted needs of global IT, while at the same time strengthening the foundation for future growth of the DRAM market.”

The newly introduced 4GB HBM2 DRAM, which uses Samsung’s most efficient 20-nanometer process technology and advanced HBM chip design, satisfies the need for high performance, energy efficiency, reliability and small dimensions making it well suited  for next-generation HPC systems and graphics cards.

Following Samsung’s introduction of a 128GB 3D TSV DDR4 registered dual inline memory module (RDIMM) last October, the new HBM2 DRAM marks the latest milestone in TSV (Through Silicon Via) DRAM technology.

The 4GB HBM2 package is created by stacking a buffer die at the bottom and four 8-gigabit (Gb) core dies on top. These are then vertically interconnected by TSV holes and microbumps. A single 8Gb HBM2 die contains over 5,000 TSV holes, which is more than 36 times that of a 8Gb TSV DDR4 die, offering a dramatic improvement in data transmission performance compared to typical wire-bonding based packages.

Samsung’s new DRAM package features 256GBps of bandwidth, which is double that of a HBM1 DRAM package. This is equivalent to a more than seven-fold increase over the 36GBps bandwidth of a 4Gb GDDR5 DRAM chip, which has the fastest data speed per pin (9Gbps) among currently manufactured DRAM chips. Samsung’s 4GB HBM2 also enables enhanced power efficiency by doubling the bandwidth per watt over a 4Gb-GDDR5-based solution, and embeds ECC (error-correcting code) functionality to offer high reliability.

In addition, Samsung plans to produce an 8GB HBM2 DRAM package within this year. By specifying 8GB HBM2 DRAM in graphics cards, designers will be able to enjoy a space savings of more than 95 percent, compared to using GDDR5 DRAM, offering more optimal solutions for compact devices that require high-level graphics computing capabilities.

The company will steadily increase production volume of its HBM2 DRAM over the remainder of the year to meet anticipated growth in market demand for network systems and servers. Samsung will also expand its line-up of HBM2 DRAM solutions to stay ahead in the high-performance computing market and extend its lead in premium memory production.

Current technology trends, including the ever-growing mobile traffic, high-quality content, data analyses and IoT platforms all add to the workload of today’s data centers and servers. As such, faster and more reliable memory solutions with heavy-duty capacities are a necessity.

Chip stacking for larger capacities does have clear benefits. However, with conventional packaging techniques that use wire bonding, chip stacks are prone to lag in speed—speed that is especially essential for enterprise servers that handle massive amounts of data. In turn, dies can only be stacked so high, further limiting the chip package capacity.

Through silicon via (TSV) is an advanced chip packaging technology that vertically connects DRAM chip dies using electrodes that penetrate the microns-thick dies through microscopic holes.
The technology marks a breakthrough from traditional wire bonding as it allows for all of the dies in a chip package to maintain their optimum performance which makes higher die stacks possible. A smaller footprint of the physical chip package is an additional bonus.

Samsung announced its TSV DDR4 DRAM in 128GB RDIMM modules for the first time in the industry, which will bring new heights to memory solutions for servers and data centers.

The three most important benefits of this new technology include:

1. Largest Capacity: Samsung’s 128GB TSV DDR4 module doubles the largest capacity of previous DRAM for enterprise servers while continuing to meet the requirements for high speed and reliability.
2. Faster Speeds: By combining TSV technology with 8Gb DRAM die, Samsung’s new TSV DDR4 RDIMM is able to pack in 128GB, meeting the needs of today’s enterprise servers with speeds of up to 2,667 megabits per second (Mbps) and 3,200Mbps. This suggests the possibility of accelerated adoption of TSV in the market, with opportunities for expanded applications in high bandwidth memory (HBM) and consumer products in the future.
3. Better Efficiency: The design of the 128GB TSV DDR4 module is also incredibly innovative. Traditional wire-bond dies are packaged together with a data buffer chip, which regulate the input/output information passing through each DRAM. Samsung’s new 128GB TSV DDR4 module embeds data buffer functions within the master chip in each chip package, producing better performance in a more energy-efficient product. Being manufactured with Samsung’s state-of-the-art 20-nanometer process technology adds to improved performance and energy efficiency, as well. As a result, the 128GB TSV DDR4 reduces the power consumption by half when compared to the previous highest capacity DRAM modules (64GB LRDIMM).

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Samsung Starts Mass Producing Industry’s First 128-Gigabyte DDR4 Modules for Enterprise Servers

Samsung Electronics announced that it is mass producing the industry’s first “through silicon via” (TSV) double data rate-4 (DDR4) memory in 128-gigabyte (GB) modules, for enterprise servers and data centers.

Following Samsung’s introduction of the world-first 3D TSV DDR4 DRAM (64GB) in 2014, the company’s new TSV registered dual inline memory module (RDIMM) marks another breakthrough that opens the door for ultra-high capacity memory at the enterprise level. Samsung’s new TSV DRAM module boasts the largest capacity and the highest energy efficiency of any DRAM modules today, while operating at high speed and demonstrating excellent reliability.

“We are pleased that volume production of our high speed, low-power 128GB TSV DRAM module will enable our global IT customers and partners to launch a new generation of enterprise solutions with dramatically improved efficiency and scalability for their investment,” said Joo Sun Choi, executive vice president, Memory Sales and Marketing, Samsung Electronics. “We will continue to expand our technical cooperation with global leaders in servers, consumer electronics and emerging markets, where consumers can benefit from innovative technology that enhances their productivity and the overall user experience.”

The 128GB TSV DDR4 RDIMM is comprised of a total of 144 DDR4 chips, arranged into 36 4GB DRAM packages, each containing four 20-nanometer (nm)-based 8-gigabit (Gb) chips assembled with cutting-edge TSV packaging technology.

Conventional chip packages interconnect die stacks using wire bonding, whereas in TSV packages, the chip dies are ground down to a few dozen micrometers, pierced with hundreds of fine holes and vertically connected by electrodes passing through the holes, allowing for a significant boost in signal transmission. In addition to capitalizing on the industry’s highest capacity and TSV’s advanced circuitry, Samsung’s 128GB TSV DDR4 module has a special design through which the master chip of each 4GB package embeds the data buffer function to optimize module performance and power consumption.

As a result, Samsung’s advanced 128GB TSV DDR4 RDIMM provides a low-power solution for next-generation servers with speeds at up to 2,400 megabits per second (Mbps), achieving nearly twice the performance, while cutting power usage by 50 percent, compared to using the previous highest capacity DRAM modules ─ 64GB LRDIMMs, whose four-chip package stacks are hampered by power and speed limitations caused by their use of conventional wire bonding.

Samsung is responding to growing demand for ultra-high capacity DRAM by accelerating production of TSV technology in the market and quickly ramping up 20nm 8Gb DRAM chips to improve manufacturing productivity. In solidifying its technology leadership and expanding the market for premium memory solutions, the company plans to provide a complete lineup of its new high-performance TSV DRAM modules within the next several weeks including 128GB load reduced DIMMs (LRDIMMs).

In addition, Samsung will continue to maintain its technology leadership by introducing TSV DRAM with higher performance. These will include modules with data transfer speeds of up to 2,667Mbps and 3,200Mbps that help to meet intensifying enterprise server needs, while expanding TSV applications into high bandwidth memory (HBM) and consumer products.

To learn more about TSV, read more here.