▲ The leaders of Samsung Foundry Business and Semiconductor R&D Center are holding up three fingers as a symbol of 3nm celebrating the company’s first ever production of 3nm process with GAA architecture.

Samsung Electronics, the world leader in semiconductor technology, today announced that it has started initial production of its 3-nanometer (nm) process node applying Gate-All-Around (GAA) transistor architecture.

Multi-Bridge-Channel FET (MBCFET), Samsung’s GAA technology implemented for the first time ever, defies the performance limitations of FinFET, improving power efficiency by reducing the supply voltage level, while also enhancing performance by increasing drive current capability.

Samsung is starting the first application of the nanosheet transistor with semiconductor chips for high performance, low power computing application and plans to expand to mobile processors.

“Samsung has grown rapidly as we continue to demonstrate leadership in applying next-generation technologies to manufacturing, such as foundry industry’s first High-K Metal Gate, FinFET, as well as EUV. We seek to continue this leadership with the world’s first 3nm process with the MBCFET,” said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics. “We will continue active innovation in competitive technology development and build processes that help expedite achieving maturity of technology.”

▲ (From left) Michael Jeong, Corporate Vice President; Ja-Hum Ku, Corporate Executive Vice President; and Sang Bom Kang, Corporate Vice President at Samsung Foundry Business are holding up 3nm wafers at the production line of Samsung Electronics Hwaseong Campus.

Design-Technology Optimization for Maximized PPA

Samsung’s proprietary technology utilizes nanosheets with wider channels, which allow higher performance and greater energy efficiency compared to GAA technologies using nanowires with narrower channels. Utilizing the 3nm GAA technology, Samsung will be able to adjust the channel width of the nanosheet in order to optimize power usage and performance to meet various customer needs.

In addition, the design flexibility of GAA is highly advantageous for Design Technology Co-Optimization (DTCO),¹ which helps boost Power, Performance, Area (PPA) benefits. Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.

Providing 3nm Design Infrastructure & Services With SAFE Partners

As technology nodes get smaller and chip performance needs grow greater, IC designers face challenges of handling tremendous amounts of data to verify complex products with more functions and tighter scaling. To meet such demands, Samsung strives to provide a more stable design environment to help reduce the time required for design, verification and sign-off process, while also boosting product reliability.

Since the third quarter of 2021, Samsung Electronics has been providing proven design infrastructure through extensive preparation with Samsung Advanced Foundry Ecosystem (SAFE) partners including Ansys, Cadence, Siemens and Synopsys, to help customers perfect their product in a reduced period of time.

Quotes from SAFE Partners

• Ansys, [John Lee, Vice President and General Manager of the Electronics, Semiconductor & Optics Business Unit at Ansys]

“Together, Ansys and Samsung continue to deliver enabling technology for the most advanced designs, now at 3nm with GAA technology. The signoff fidelity of our Ansys multiphysics simulation platform is testament to our continued partnership with Samsung Foundry at the leading edge. Ansys remains committed to delivering the best design experience for our mutual advanced customers.”

• Cadence, [Tom Beckley, Senior Vice President and General Manager, Custom IC & PCB Group at Cadence]

“We congratulate Samsung on this 3nm GAA production release milestone. Cadence worked closely with Samsung Foundry to enable customers to achieve optimal power, performance and area for this node using our digital solutions from library characterization to full digital flow implementation and signoff, all driven by our Cadence Cerebrus AI-based technology to maximize productivity. With our custom solutions, we collaborated with Samsung to enable and validate a full AMS flow to enhance productivity from circuit design and simulation through automated layout. We look forward to continuing this collaboration to achieve more tapeout successes.”

• Siemens EDA, [Joe Sawicki, Executive Vice President for the IC-EDA segment of Siemens Digital Industries Software]

“Siemens EDA is pleased to have collaborated with Samsung to help ensure that our existing software platforms also work on Samsung’s new 3-nanometer process node since the initial development phase. Our longtime partnership with Samsung through the SAFE program generates significant value for our mutual customers, by certification of Siemens industry-leading EDA tools at 3nm.”

• Synopsys, [Shankar Krishnamoorthy, General Manager and Corporate Staff for the Silicon Realization Group at Synopsys]

“Through our long-standing, strategic collaboration with Samsung Foundry, we are enabling our solutions to support Samsung’s advanced processes, helping our mutual customers significantly accelerate their design cycles. Our support for Samsung’s 3nm process with GAA architecture continues expanding, now with our Synopsys Digital Design, Analog Design and IP products, enabling customers to deliver differentiated SoCs for key high-performance computing applications.”

¹ For more information on Design Technology Co-Optimization (DTCO), please see below links:

Find the optimal for the best. Part 1

Find the optimal for the best. Part 2

Samsung Electronics, a world leader in advanced semiconductor technology, today unveiled plans for continuous process technology migration to 3- and 2-nanometer (nm) based on the company’s Gate-All-Around (GAA) transistor structure at its 5^th annual Samsung Foundry Forum (SFF) 2021.

With a theme of Adding One More Dimension, the multi-day virtual event is expected to draw over 2,000 global customers and partners. At this year’s event, Samsung will share its vision to bolster its leadership in the rapidly evolving foundry market by taking each respective part of foundry business to the next level: process technology, manufacturing operations and foundry services.

“We will increase our overall production capacity and lead the most advanced technologies while taking silicon scaling a step further and continuing technological innovation by application,” said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics.” Amid further digitalization prompted by the COVID-19 pandemic, our customers and partners will discover the limitless potential of silicon implementation for delivering the right technology at the right time.”

GAA Is Ready for Customers’ Adoption – 3nm MP in 2022, 2nm in 2025

With its enhanced power, performance and flexible design capability, Samsung’s unique GAA technology, Multi-Bridge-Channel FET (MBCFET^TM), is essential for continuing process migration. Samsung’s first 3nm GAA process node utilizing MBCFET will allow up to 35 percent decrease in area, 30 percent higher performance or 50 percent lower power consumption compared to the 5nm process. In addition to power, performance and area (PPA) improvements, as its process maturity has increased, 3nm’s logic yield is approaching a similar level to the 4nm process, which is currently in mass production.

Samsung is scheduled to start producing its customers’ first 3nm-based chip designs in the first half of 2022, while its second generation of 3nm is expected in 2023. Newly added to Samsung’s technology roadmap, the 2nm process node with MBCFET is in the early stages of development with mass production in 2025.

FinFET for CIS, DDI, MCU – 17nm Specialty Process Technology Debuts

Samsung Foundry is continuously improving its FinFET process technology to support specialty products with cost-effective and application-specific competitiveness. A good example of this is the company’s 17nm FinFET process node. In addition to the intrinsic benefits afforded by FinFET, the process node has excellent performance and power efficiency leveraging a 3D transistor architecture. Consequently, Samsung’s 17nm FinFET provides up to 43 percent decrease in area, 39 percent higher performance or a 49 percent increase in power efficiency compared to the 28nm process.

Additionally, Samsung is advancing its 14nm process in order to support 3.3V high voltage or flash-type embedded MRAM (eMRAM) which enables increased write speed and density. It will be a great option for applications such as micro controller units (MCUs), IoT and wearables. Samsung’s 8nm radio frequency (RF) platform is expected to expand the company’s leadership in the 5G semiconductor market from sub-6GHz to mmWave applications.

Looking ahead, in cooperation with its ecosystem partners, Samsung Foundry’s SAFE Forum will be held virtually in November 2021.

In order to reduce the size of semiconductors, FinFET architecture was introduced to further scale gate length. As Samsung designed even smaller microchips, new challenges arose, and achieving below 4-5 nm has proved difficult when using the current FinFET transistor architecture. This observation has spurred the company to innovate and implement its new Gate-All-Around (GAA) transistors.

Samsung re-designed the existing GAA to become the Multi Bridge Channel FET (MBCFET). The MBCFET is more power-efficient than the GAA, and its performance is subsequently better. Samsung’s patented MBCFET is formed as a nanosheet, allowing for a larger current and simpler device integration.

Take a look at the infographic below to learn more about how Samsung’s GAA is advancing the future of semiconductor technology.

The newest process node, 8LPP provides up to 10-percent lower power consumption with up to 10-percent area reduction from 10LPP through narrower metal pitch. 8LPP will provide differentiated benefits for applications including mobile, cryptocurrency and network/server, and is expected to be the most attractive process node for many other high performance applications.

As the most advanced and competitive process node before EUV (extreme ultra violet) is employed at 7nm, 8LPP is expected to rapidly ramp-up to the level of stable yield by adopting the already proven 10nm process technology.

“With the qualification completed three months ahead of schedule, we have commenced 8LPP production,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “Samsung Foundry continues to expand its process portfolio in order to provide distinct competitive advantages and excellent manufacturability based on what our customers and the market require.”

“8LPP will have a fast ramp since it uses proven 10nm process technology while providing better performance and scalability than current 10nm-based products” said RK Chunduru, Senior Vice President of Qualcomm.

Details of the recent update to Samsung’s foundry roadmap, including 8LPP availability and 7nm EUV development, will be presented at the Samsung Foundry Forum Europe on October 18, 2017, in Munich, Germany. The Samsung Foundry Forum was held in the United States, South Korea and Japan earlier this year, sharing Samsung’s cutting-edge process technologies with global customers and partners.

Samsung Electronics, a world leader in advanced semiconductor technology, today introduced its image sensor brand ‘ISOCELL^®’ as well as demonstrated leading-edge solutions at the 2017 Mobile World Congress (MWC) Shanghai.

Samsung’s brand for its image sensor lineup is named after the company’s own ISOCELL technology, which is the optimum solution for today’s devices that require ultra-slim designs with high quality cameras. First introduced in 2013, ISOCELL technology separates each pixel with a physical barrier that reduces color crosstalk among pixels. This allows high color fidelity, enabling excellent image quality even with smaller pixels.

Samsung ISOCELL is underlined by four technological sub-brands—Bright, Fast, Slim and Dual—that respond to specific market demands:

• ISOCELL Bright sensors deliver bright and sharp images with high color fidelity and reduced noise in low light environments
• ISOCELL Fast sensors provide fast autofocus onto still or moving objects even when dark
• ISOCELL Slim sensors adopt the smallest pixel sizes available in the market at 0.9-1.0um, yet produce high quality images for the slimmest devices
• ISOCELL Dual sensors can be mixed and matched in various combinations on consumer devices to bring about features demanded in the latest dual camera trend

“Samsung ISOCELL is a brand that represents the essence of our leading pixel technologies. We expect the ISOCELL brand to help consumers easily acknowledge and confide in camera performance as well as overall quality of the device,” said Ben Hur, Vice President of System LSI marketing at Samsung Electronics. “With our advanced image sensor technologies, Samsung will continue to bring innovation to cameras used in smartphones and other applications.”

At MWC Shanghai, Samsung will be featuring advanced logic solutions, including the Exynos 9 series with 10-nanometer FinFET process technology, for a wide range of platforms such as mobile, Virtual Reality (VR) and wearable devices.

Samsung was the first in the industry to begin mass production of system-on-chips (SoCs) products on 10LPE last October. The latest Samsung Galaxy S8 smartphones are powered by some of these SoCs.

To meet long-term demand for the 10nm process for a wide range of customers, Samsung has started installing production equipment at its newest S3-line in Hwaseong, Korea. The S3-line is expected to be ready for production by the fourth quarter of this year.

“With our successful 10LPE production experience, we have commenced production of the 10LPP to maintain our leadership in the advanced-node foundry market,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “10LPP will be one of our key process offerings for high performance mobile, computing and network applications, and Samsung will continue to offer the most advanced logic process technology.”

Samsung Electronics, a world leader in advanced semiconductor technology, today announced a successful network processor tape-out based on Samsung’s 14LPP (Low-Power Plus) process technology in close collaboration with eSilicon and Rambus. This achievement is built on Samsung’s cutting-edge foundry process and design infra for network applications, eSilicon’s complex ASIC and 2.5D design capability with its IP solutions, and Rambus’ high-speed 28G SerDes solution.

Samsung’s 14LPP process technology based on 3D FinFET structure has already been proven for its high performance and manufacturability through mass production track record. The next generation process for network application is 10LPP process which is based on 10LPE (Low-Power Early) of which mass production was started from last year for the first time in the industry. 10LPP process’ mass production will be started in this year end.

Additionally, Samsung named its newly developed full 2.5D turnkey solution, which connects a logic chip and HBM2 memory with an interposer, as I-Cube^TM (Interposer-Cube) solution. This 14LPP network process chip is the first product that Samsung applied I-Cube^TM solution together with Samsung’s HBM2 memory. The I-Cube^TM solution will be essential to network applications for high-speed signaling, and it is expected to be adopted into other applications such as computing, server and AI in the near future.

“I am delighted to announce 14nm network processor tape-out,” said Ryan Lee, Vice President of Foundry Marketing Team at Samsung Electronics. “This successful product tape-out was combined with eSilicon’s proven design ability in network area and Rambus’ expertise in SerDes and Samsung’s robust process technology along with I-Cube solution. This collaboration model is very unique solution which will have very big impact in network foundry segment. Samsung will keep developing its network foundry solution to be a meaningful total network solution provider aligned with its process roadmap from 14nm and 10nm to 7nm.”

“This project was a true collaboration between Samsung, Rambus and eSilicon. eSilicon is proud to bring its FinFET ASIC and interposer design skills along with our substantial 2.5D integration skills to the project,’” said Patrick Soheili, Vice President of Product Management and corporate development at eSilicon. “Our HBM Gen2 PHY, custom flip-chip package design and custom memory designs also helped to optimize the power, performance and area for the project.”

“Networking OEMs are looking for high-quality leadership IP suppliers that can bring 28G backplane SerDes in advanced FinFET process nodes to market,” said Luc Seraphin, senior vice president and general manager of Rambus Memory and Interfaces Division. “Our success with Samsung and eSilicon is a testament that these industry-leading solutions are attainable when you bring leading companies together. This is the first of several other offerings we plan to bring to networking and enterprise ASIC markets around the globe.”

*Tape out(T/O): The last step in designing a new chip. By the time of the tape-out, the photo-mask of a chip is completed, and is then ready to be sent to a foundry.

Samsung has shipped more than 70,000 silicon wafers of its first-generation 10nm LPE (Low Power Early) to date. The company began the industry’s first mass production of 10LPE last October.

Back in 2015, Samsung introduced the industry’s first 14nm FinFET LPE technology for mobile applications based on 3D FinFET structure. Since then, Samsung has successfully delivered further enhancements in power, performance and scalability for both 14nm and 10nm FinFET technology.

“Samsung’s 10nm LPE is a game changer in the foundry industry. Following the 10LPE version, the 10nm LPP and LPU will enter mass production by the end of the year and next year, respectively.” said Jongshik Yoon, Executive Vice President and Head of Foundry Business at Samsung Electronics. “We will continue to offer the most competitive process technology in the industry.”

Samsung Electronics has also announced the addition of the 8nm and the 6nm process technologies to its current process roadmap. Samsung’s 8nm and 6nm offerings will provide greater scalability, performance and power advantages when compared to existing process nodes. The 8nm and the 6nm will inherit all innovations from the latest 10nm and the 7nm technologies with design infrastructure enhancements to meet various customer needs and provide further cost competitiveness.

Samsung’s foundry technology roadmap and technical details, including the newest 8nm and the 6nm, will first be open to its customers and partners at the upcoming U.S Samsung Foundry Forum scheduled for May 24, 2017.

Samsung Electronics, a world leader in advanced semiconductor technology, today announced the launch of its latest premium application processor (AP), the Exynos 9 Series 8895. This is Samsung’s first processor chipset to take advantage of the most advanced and industry leading 10-nanometer (nm) FinFET process technology with improved 3D transistor structure, which allows up to 27% higher performance while consuming 40% less power when compared to 14nm technology.

The new Exynos 9 Series 8895 is the first processor of its kind to embed a gigabit LTE modem that supports five carrier aggregation, or 5CA. It delivers fast and stable data throughput at max.1Gbps (Cat.16) downlink with 5CA and 150Mbps (Cat.13) uplink with 2CA.

The Exynos 8895 is an octa-core processor, comprising of four of Samsung’s 2^nd generation custom designed CPU cores for improved performance and power efficiency in addition to four Cortex®-A53 cores. With Samsung Coherent Interconnect (SCI) technology, the latest processor integrates a heterogeneous system architecture that allows faster computing for a wide range of applications such as artificial intelligence, and deep learning.

The Exynos 8895 also delivers unsurpassed multimedia experience with its powerful GPU and multi-format codec (MFC) as well as next level 3D graphic performance that minimizes latency for 4K UHD VR and gaming experience with ARM®’s latest Mali-G71 GPU.

In addition, with its advanced MFC, the processor supports video recording and playback at a maximum resolution of 4K UHD at 120fps. It also comes with video processing technology that enables a higher quality experience by enhancing the image quality; for example, for VR (Virtual Reality) applications, the Exynos 8895 delivers a realistic and immersive VR video experience at 4K resolution.

The Exynos 8895 has a separate processing unit for enhanced security solutions required for mobile payments that use iris or fingerprint recognition as well as an embedded Vision Processing Unit (VPU) that can recognize and analyze items or movements for improved video tracking, panoramic image processing, and machine vision technology.

“In addition to being built on the most advanced 10nm FinFET process technology, the new Exynos 9 Series 8895 incorporates Samsung’s cutting-edge technologies including a 2^nd generation custom CPU, gigabit LTE modem, and more” said Ben Hur, Vice President of System LSI marketing at Samsung Electronics. “With industry leading technologies like VPU, the Exynos 8895 will drive the innovation of next generation smartphones, VR headsets, and automotive infotainment system.”

The Exynos 9 Series 8895 is currently in mass production.

For more information about Samsung’s Exynos products, please visit www.samsung.com/exynos

Following the successful mass production of the industry’s first FinFET mobile application processor (AP) in January, 2015, Samsung extends its leadership in delivering leading-edge process technology to the mass market with the latest offering.

“The industry’s first mass production of 10nm FinFET technology demonstrates our leadership in advanced process technology,” said Jong Shik Yoon, Executive Vice President, Head of Foundry Business at Samsung Electronics. “We will continue our efforts to innovate scaling technologies and provide differentiated total solutions to our customers.”

Samsung’s new 10nm FinFET process (10LPE) adopts an advanced 3D transistor structure with additional enhancements in both process technology and design enablement compared to its 14nm predecessor, allowing up to 30-percent increase in area efficiency with 27-percent higher performance or 40-percent lower power consumption. In order to overcome scaling limitations, cutting edge techniques such as triple-patterning to allow bi-directional routing are also used to retain design and routing flexibility from prior nodes.

Following the introduction of Samsung’s first-generation 10nm process (10LPE), its second generation process (10LPP) with performance boost is targeted for mass production in the second half of 2017. The company plans to continue its leadership with a variety of derivative processes to meet the needs of a wide range of applications.

Through close collaboration with customers and partners, Samsung also aims to cultivate a robust 10nm foundry ecosystem that includes reference flow verification, IPs and libraries.

Production level process design kits (PDK) and IP design kits are currently available for design starts.

SoCs with 10nm process technology will be used in digital devices launching early next year and are expected to become more widely available throughout 2017.

From the powerful Exynos APs for premium mobile devices to a more compact version designed specifically for wearables, Samsung features a strong lineup that brings the benefits of cutting-edge technology to the devices people use every day.

*All functionality features, specifications and other product information provided in this document including, but not limited to, the benefits, design, pricing, components, performance, availability and capabilities of the product are subject to change without notice or obligation.

Samsung Electronics, a world leader in advanced semiconductor technology, today announced that it has begun mass production of the Exynos 7 Dual 7270. It is the first mobile application processor (AP) in the industry designed specifically for wearable devices with 14-nanometer (nm) FinFET process technology. It is also the first in its class to feature full connectivity and LTE modem integration.

Since 2015, Samsung has been leading the industry in expanding the adoption of 14nm technology for a wide variety of products from premium smartphones to entry-level mobile devices. With the Exynos 7270, the company also introduces the benefits of this cutting-edge technology to wearables.

“The Exynos 7270 presents a new paradigm for system-on-chips (SoC) dedicated to wearables,” said Ben K. Hur, Vice President of System LSI Marketing at Samsung Electronics. “Designed on our state-of-the-art process technology, this AP offers great power savings, 4G LTE modem and full connectivity solution integration, as well as innovative packaging technology optimized for wearable devices. It is a ground-breaking solution that will greatly accelerate wider adoption of wearable devices by overcoming limitations in current solutions such as energy usage and design flexibility.”

Powered by two Cortex^®-A53 cores, the Exynos 7270 makes full use of the 14nm process, delivering 20 percent improvement in power efficiency when compared to its predecessor built on 28nm, and thus notably extending the battery life. By integrating Cat.4 LTE modem, the new AP allows wearables to connect to a cellular service as a stand-alone device. Tethering and data transfer between devices is also possible with its embedded WiFi and Bluetooth connectivity. In addition, integrated connectivity capabilities support FM (frequency modulation) radio, and location-based services with GNSS (global navigation satellite system) solutions.

As well as the implementation of the advanced 14nm FinFET process, Samsung’s innovative packaging technology, SiP(system-in-package)-ePoP(embedded package-on-package), enables the Exynos 7270 to feature outstanding performance and energy-efficiency within a compact solution optimized for wearable devices. The technology combines the AP, DRAM and NAND flash memory chips as well as the PMIC (power management IC) together into a single package. The solution can offer more features than its predecessor in the same 100-square-millimeter (mm²) area while reducing the height by approximately 30 percent. This gives more room for device manufacturers to design high performance, ultra-slim wearable devices.

To expedite the development process, a reference platform comprised of the Exynos 7270, NFC (near field communication) and various sensors is currently available for device manufacturers and customers.

For more information about Samsung’s Exynos products, please visit www.samsung.com/exynos

The industry’s solution to the dilemma was to adopt three dimensional concepts to semiconductor structures at several different stages of the engineering process, hence ‘3D semiconductor technologies.’

Here are some of the key ‘3D technologies’ that Samsung has introduced to the semiconductor industry, and how they tackled important technical challenges in meeting the market requirements.

14-nanometer FinFET

While conventional 2D transistors started to show several problems, including current leakage (a.k.a. short channel effect) that comes with finer technologies, the 14-nanometer (nm) FinFET technology raises a ‘fin’ that wraps over the conducting channel. This allows better control of the current in finer circuit designs. The new structure significantly decreases data leakage while demonstrating greater power advantages.

Samsung made this cutting-edge technology available at the end of 2014 which has enhanced hardware design and performance in today’s premium mobile devices.

Vertical NAND (V-NAND)

Advanced NAND flash technology at smaller design nodes started to experience issues with performance and durability, including data crosstalk.

In 2013, Samsung reached a breakthrough by mass producing V-NAND memory, which vertically stacks the cells with 3D Charge Trap Flash structures, which drastically increases density with less energy consumption and enhanced endurance. Samsung is currently mass producing its third-generation V-NAND lineup.

TSV (Through Silicon Via)

Instead of the traditional method of connecting the stacked dies externally with gold wire, we are now able to pierce hundreds of fine holes through the dies and then vertically connect them through the holes, allowing faster data processing with less power consumed. This technology is called 3D Through Silicon Via, or TSV.

Early this year, Samsung started mass producing the industry’s fastest DRAM package (4GB) based on the High Bandwidth Memory 2 (HBM2) interface. The state-of-the-art technology allows next-generation High Performance Computing systems and graphics cards brought to life.

Samsung Electronics, a world leader in advanced semiconductor technology, announced that the Exynos 8 Octa, its 2^nd generation premium mobile processor on 14nm FinFET technology, will power the latest Samsung Galaxy S7 and S7 edge.

“The continuous adoption of our Exynos processors in flagship smartphone models like the Galaxy S7 and S7 edge underscores our technology leadership in the mobile SoC sector,” said Ben K. Hur, Vice President of marketing, System LSI Business at Samsung Electronics. “Integrating custom-designed CPU cores for unrivalled performance and incredibly fast LTE Cat. 12/13 modem, the new Exynos 8 Octa will bring the most exciting mobile experience to Galaxy S7 users.”

The 64-bit custom CPU cores in the Exynos 8 Octa have been designed to deliver unparalleled performance and power efficiency. Built on Samsung’s 2^nd generation 14nm FinFET process, the Exynos 8 Octa delivers improvements in performance by more than 30 percent and in power efficiency by 10 percent, compared to its predecessor, the Exynos 7 Octa 7420.

The Exynos 8 Octa also integrates the most advanced LTE Rel.12 Cat.12/13 modem for cutting-edge speed in connectivity. It offers downlink speed of up to 600Mbps (Cat.12) and an upload speed of up to 150Mbps (Cat.13) with carrier aggregation, which will transform mobile user experience.

The Exynos 8 Octa will be shown at Samsung’s booth, Hall 2, Booth 2F21 at Mobile World Congress 2016 from February 22 to 25 in Fira Gran Via, Barcelona, Spain, along with other Exynos products including the recently introduced Exynos 7 Octa 7870.

In leading mass production of advanced FinFET logic process, Samsung announced in Q1 of 2015 the launch of the Exynos 7 Octa processor built on the industry’s first 14nm LPE (Low-Power Early) process. With the new 14nm LPP process, Samsung continues to demonstrate its process technology leadership, and unparalleled performance and power efficiency for its Exynos 8 Octa processor and its many foundry customers including Qualcomm Technologies, Inc.. The Qualcomm® Snapdragon 820 processor uses Samsung’s new 14nm LPP process and is expected to be in devices in the first half of this year.

“We are pleased to start production of our industry-leading, 2nd generation 14nm FinFET process technology that delivers the highest level of performance and power efficiency” said Charlie Bae, Executive Vice President of Sales & Marketing, System LSI Business, Samsung Electronics. “Samsung will continue to offer derivative processes of its advanced 14nm FinFET technology to maintain our technology leadership.”

Incorporating three-dimensional (3D) FinFET structure on transistors enables significant performance boost and low power consumption. Samsung’s new 14nm LPP process delivers up to 15 percent higher speed and 15 percent less power consumption over the previous 14nm LPE process through improvements in transistor structure and process optimization. In addition, use of fully-depleted FinFET transistors brings enhanced manufacturing capabilities to overcome scaling limitations.

With its superb characteristics, 14nm FinFET process is considered to be one of the most optimized solutions for mobile and IoT applications and is expected to meet growing market demand for a wide range of high performance and power efficient applications from network to automotive.

Related stories:

Samsung Unveils the Latest Application Processor, Exynos 8 Octa, Built on 14-Nanometer FinFET Process Technology