The new foundry line, which will focus on EUV-based 5 nanometer (nm) and below process technology, has just commenced construction this month and is expected to be in full operation in the second half of 2021. It will play a pivotal role as Samsung aims to expand the use of state-of-the-art process technologies across a myriad of current and next generation applications, including 5G, high-performance computing (HPC) and artificial intelligence (AI).

“This new production facility will expand Samsung’s manufacturing capabilities for sub-5nm process and enable us to rapidly respond to the increasing demand for EUV-based solutions,” said Dr. ES Jung, President and Head of Foundry Business at Samsung Electronics. “We remain committed to addressing the needs of our customers through active investments and recruitment of talents. This will enable us to continue to break new ground while driving robust growth for Samsung’s foundry business.”

Following the initial mass production of the EUV-based 7nm process in early 2019, Samsung recently added a new EUV-dedicated V1 line in Hwaseong, Korea, to its global foundry network. With the new Pyeongtaek facility starting full operation in 2021, Samsung’s foundry capacity based on EUV is expected to increase significantly.

Samsung is scheduled to start mass production of 5nm EUV process in the Hwaseong fab in the second half of this year.

With the addition of the Pyeongtaek fab, Samsung will have a total of seven foundry production lines located in South Korea and the United States, comprised of six 12-inch lines and one 8-inch line.

During a keynote speech at the 2018 IEEE* International Electron Devices Meeting (IEDM), Dr. ES Jung, president and head of Foundry Business at Samsung Electronics, shared his vision that the next industrial revolution can only happen by the continuous evolution of semiconductor technology.

In his presentation “Fourth Industrial Revolution and Foundry: Challenges and Opportunities”, Dr. Jung explained that the evolution of advanced foundry technologies will be crucial to enable the design and manufacture of innovative semiconductor products that will take our everyday life into new and previously unthought-of directions.

New and exciting applications such as AI, cloud computing, autonomous vehicles, and smart home require high-level technologies including sophisticated design and system level optimization.

Dr. Jung discussed the increased complexities of semiconductor technology that has altered the role of the semiconductor foundry from a conventional wafer manufacturing business to a total solution provider. Today, foundries are providing value-added services, especially in the areas of design service and infrastructure, product engineering, and packaging/testing.

Semiconductors have evolved to be faster in speed, higher in density, and lower in power consumption, allowing a wide range of new and innovative applications. In addition, to analyze exponentially growing, unprecedented amounts of data, new memory architectures and completely new schemes of computation, such as neuromorphic computing, have to be developed.

“None of these technological advancements would have been possible without collaboration across the entire semiconductor industry” emphasized Dr. Jung. “This collaboration is paramount between material, equipment, electronic devices, government, universities, research centers, and consortiums, to ensure the success in the upcoming 4^th industrial revolution.”

New Technological Milestones

Dr. Jung also introduced some of recent research and development in future silicon technology, including MRAM, a non-volatile memory solution embedded in conventional logic process, and 3nm Gate-All-Around (GAA) technology.

MRAM is one of the examples of new semiconductor devices that consume much less power. As memory density becomes higher, MRAM’s power efficiency becomes more prominent, consuming only 0.5% of power compared to SRAM at 1,024Mb. MRAM also has smaller cell area, which allows design flexibility.

Samsung’s unique GAA technology called Multi-Bridge-Channel FET(MBCFET) uses vertically stacked multiple nanosheet channels. With variable width of nanosheet, this technology provides not only optimal performance and power characteristics, but also high design flexibility. Furthermore, MBCFET is fabricated using 90% or more of FinFET process with only a few revised masks, allowing easy migration.

Also with one of its newly published papers at 2018 IEDM, Samsung Electronics shared the development progress of 3nm, a successful demonstration of fully functioning high-density SRAM circuit. The development of Samsung’s first process node applying MBCFET technology is on schedule.

For more information, please visit https://www.samsungfoundry.com

* IEEE (Institute of Electrical and Electronics Engineers) is one of the world’s largest associations of technical professionals dedicated to advancing technologies, including electronic engineering, telecommunications, and computer engineering. Link

Currently, customers are working closely with Samsung to utilize the company’s cutting-edge 8-inch technology offerings in various applications. All 8-inch offerings, ranging from 180nm to 65nm, are processed at Line 6, a highly automated facility in Giheung, Korea.

“Customers’ interests are very high given the industry’s needs for alternative 8-inch solutions.” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “By expanding our technology offerings into the RF/IoT and fingerprint segments, we will enable our customers to take advantage of Samsung’s state-of-the-art 8-inch solutions in a broader range of applications”.

Samsung’s 8-inch process technology offerings now include the following solutions;

• eFlash : 130nm, 65nm
• Power: 130nm, 90nm (BCD+eFlash)
• Display Driver IC : 180nm, 130nm, 90nm, 70nm
• CMOS Image Sensor: 90nm
• RF/IoT : 90nm (Ultra low leakage device)
• Fingerprint Sensor: 180nm

The 8-inch foundry market has been one of the focal points since Samsung Foundry became a separate business last May. In this regard, Samsung has firmly established customer centric 8-inch service capabilities with great multi project wafer (MPW) programs as well as intellectual property (IP), and launched the Samsung Advanced Foundry Ecosystem (SAFE^TM) program this year.

For more information about Samsung Foundry, please visit https://www.samsungfoundry.com

Samsung Electronics, a world leader in advanced semiconductor technology, has announced today its continued commitment to first-pass silicon success for its foundry customers’ chip designs by launching the Samsung Advanced Foundry Ecosystem (SAFE^TM) program.

The SAFE^TM program ensures deep collaboration between the Samsung Foundry, ecosystem partners, and customers to deliver competitive and robust System on Chip (SoC) designs based on certified key design components including Process Design Kit (PDK), reference flows with Design Methodologies(DM), Intellectual Property (IP), and ASIC design support.

“We are very excited to provide the comprehensive, collaborative, and qualified Samsung Advanced Foundry Ecosystem to our customers to enable faster and more reliable SoC design success”, said Jong Shik Yoon, executive vice president of Foundry Technology Development at Samsung Electronics. “Together with our SAFE^TM partners, Samsung Foundry will provide certified design enablement solutions to existing strategic customers as well as innovative, new start-up customers. We welcome all current and future Ecosystem partners to join the new SAFE^TM program.”

The SAFE^TM program is based on three pillars :

• EDA/DM : Provides extensively tested PDKs and reference flows (with design methodologies) that are backed by Samsung Foundry’s certification.
• IP : Provides a full set of silicon qualified, application specific IP offerings from the early stage of process technology development. Customers can view a full list of IP solutions offered through SAFE^TM by accessing Samsung Foundry’s B2B site, CONNECT(https://www.samsungfoundry.com).
• Design Services : Connects mid- to small-sized companies with qualified ASIC design services and support. Using design service partners of SAFE^TM, customers will benefit from easy access to process technology information, competitive price conditions, and committed resources for their SoC design success.

For more information about Samsung Foundry, please visit https://www.samsungfoundry.com

Quotes from SAFE^TM  Partner Companies

• Arm, Gus Yeung, vice president and general manager of Physical Design Group

“The Samsung Advanced Foundry Ecosystem creates significant opportunities for the industry. Through our ongoing collaboration with the Samsung Foundry, we are enabling the ecosystem with access to leadership co-optimized physical IP solutions for enhancing next-generation SoC designs.”

• AlphaHoldings, Donggi Kim, CEO

“It’s honor to be one of the initial member of SAFE. As a Korean design service partner, we are ready to support Samsung Foundry’s ASIC customers more effective way based on long-term collaboration with Samsung Foundry and competencies – leading edge process experiences, customer specific IP, high quality manpower, error free design capabilities, etc.”

• Cadence, KT Moore, vice president, product management

“We’ve collaborated with Samsung Foundry for many years to enable our joint customers to achieve their aggressive design goals. We believe that the new SAFE foundry design program will facilitate innovation and help customers deliver designs to market even faster. Our support for Samsung Foundry’s process technologies continues to expand with our broadened IP portfolio and full EDA tool enablement with comprehensive reference flows.”

• eSilicon, Hugh Durdan, vice president, strategy and products

“Through our Tier 1 ASIC work with Samsung Foundry, we understand Samsung Foundry’s advanced process technologies well. This allows us to offer differentiating IP targeted at the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets using these advanced process technologies.”

• Faraday, Steve Wang, President

“Samsung Foundry provides the most competitive grand ecosystem for the leading edge technologies. Since our establishment in 1993, Faraday has successfully delivered more than 2,200 ASIC mass production projects. Thus we are confident in our ability to leverage the SAFE program, targeting next-generation applications now and beyond.”

• Mentor, Joe Sawicki, vice president, Design to Silicon

“Mentor is proud that it has been the signoff solution for Samsung’s own design efforts over the last two decades and Samsung Foundry since the foundry was launched in 2005. We are pleased to be continuing our close partnership with Samsung as it expands its ecosystem interactions via the Samsung SAFE initiative.”

• Rambus, Luc Seraphin, senior vice president and general manager, Memory and Interfaces Division

“As ASIC and SoC designs continue to increase in complexity, high-speed interfaces are integral to successful design. This strong partnership between Rambus and Samsung across multiple nodes, ensures that we are providing a broad portfolio of high-quality solutions to our end customers. We are pleased to collaborate with Samsung Foundry to provide designers with leading high-speed SerDes and memory PHY IP solutions for easy integration into their chip designs.”

• Synopsys, Deirdre Hanford, co-general manager, Design Group

“Our collaboration with Samsung Foundry since 2005 has enabled mutual customers to deliver state-of-the-art designs across a wide range of Samsung’s process technologies. The SAFE program will help accelerate adoption of Synopsys’ high-quality IP, market-leading tools, and comprehensive design services supporting Samsung Foundry for development of their differentiated SoCs.”

• VeriSilicon, Wayne Dai, President and CEO

“Our experience in shipping high volume SoCs using Samsung 14nm and 10nm FinFET, as well as 28nm FD-SOI process demonstrates that Samsung Foundry has excellent potential for the China market. Now as a charter member of SAFE, we will expand our partnership to a new level enabling us to better support our mutual customers.”

The newest process node, 8LPP provides up to 10-percent lower power consumption with up to 10-percent area reduction from 10LPP through narrower metal pitch. 8LPP will provide differentiated benefits for applications including mobile, cryptocurrency and network/server, and is expected to be the most attractive process node for many other high performance applications.

As the most advanced and competitive process node before EUV (extreme ultra violet) is employed at 7nm, 8LPP is expected to rapidly ramp-up to the level of stable yield by adopting the already proven 10nm process technology.

“With the qualification completed three months ahead of schedule, we have commenced 8LPP production,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “Samsung Foundry continues to expand its process portfolio in order to provide distinct competitive advantages and excellent manufacturability based on what our customers and the market require.”

“8LPP will have a fast ramp since it uses proven 10nm process technology while providing better performance and scalability than current 10nm-based products” said RK Chunduru, Senior Vice President of Qualcomm.

Details of the recent update to Samsung’s foundry roadmap, including 8LPP availability and 7nm EUV development, will be presented at the Samsung Foundry Forum Europe on October 18, 2017, in Munich, Germany. The Samsung Foundry Forum was held in the United States, South Korea and Japan earlier this year, sharing Samsung’s cutting-edge process technologies with global customers and partners.