Samsung Electronics, a world leader in advanced memory technology, today announced that it has developed HBM3E 12H, the industry’s first 12-stack HBM3E DRAM and the highest-capacity HBM product to date.

Samsung’s HBM3E 12H provides an all-time high bandwidth of up to 1,280 gigabytes per second (GB/s) and an industry-leading capacity of 36 gigabytes (GB). In comparison to the 8-stack HBM3 8H, both aspects have improved by more than 50%.

“The industry’s AI service providers are increasingly requiring HBM with higher capacity, and our new HBM3E 12H product has been designed to answer that need,” said Yongcheol Bae, Executive Vice President of Memory Product Planning at Samsung Electronics. “This new memory solution forms part of our drive toward developing core technologies for high-stack HBM and providing technological leadership for the high-capacity HBM market in the AI era.”

The HBM3E 12H applies advanced thermal compression non-conductive film (TC NCF), allowing the 12-layer products to have the same height specification as 8-layer ones to meet current HBM package requirements. The technology is anticipated to have added benefits especially with higher stacks as the industry seeks to mitigate chip die warping that come with thinner die. Samsung has continued to lower the thickness of its NCF material and achieved the industry’s smallest gap between chips at seven micrometers (µm), while also eliminating voids between layers. These efforts result in enhanced vertical density by over 20% compared to its HBM3 8H product.

Samsung’s advanced TC NCF also improves thermal properties of the HBM by enabling the use of bumps in various sizes between the chips. During the chip bonding process, smaller bumps are used in areas for signaling and larger ones are placed in spots that require heat dissipation. This method also helps with higher product yield.

As AI applications grow exponentially, the HBM3E 12H is expected to be an optimal solution for future systems that require more memory. Its higher performance and capacity will especially allow customers to manage their resources more flexibly and reduce total cost of ownership (TCO) for datacenters. When used in AI applications, it is estimated that, in comparison to adopting HBM3 8H, the average speed for AI training can be increased by 34% while the number of simultaneous users of inference services can be expanded more than 11.5 times.¹

Samsung has begun sampling its HBM3E 12H to customers and mass production is slated for the first half of this year.

¹ Based on internal simulation results

First Integration of HBM-PIM Into an AI Accelerator

In February, Samsung introduced the industry’s first HBM-PIM (Aquabolt-XL), which incorporates the AI processing function into Samsung’s HBM2 Aquabolt, to enhance high-speed data processing in supercomputers and AI applications. The HBM-PIM has since been tested in the Xilinx Virtex Ultrascale+ (Alveo) AI accelerator, where it delivered an almost 2.5X system performance gain as well as more than a 60% cut in energy consumption.

“HBM-PIM is the industry’s first AI-tailored memory solution being tested in customer AI-accelerator systems, demonstrating tremendous commercial potential,” said Nam Sung Kim, senior vice president of DRAM Product & Technology at Samsung Electronics. “Through standardization of the technology, applications will become numerous, expanding into HBM3 for next-generation supercomputers and AI applications, and even into mobile memory for on-device AI as well as for memory modules used in data centers.”

“Xilinx has been collaborating with Samsung Electronics to enable high-performance solutions for data center, networking and real-time signal processing applications starting with the Virtex UltraScale+ HBM family, and recently introduced our new and exciting Versal HBM series products,” said Arun Varadarajan Rajagopal, senior director, Product Planning at Xilinx, Inc. “We are delighted to continue this collaboration with Samsung as we help to evaluate HBM-PIM systems for their potential to achieve major performance and energy-efficiency gains in AI applications.”

DRAM Modules Powered by PIM

The Acceleration DIMM (AXDIMM) brings processing to the DRAM module itself, minimizing large data movement between the CPU and DRAM to boost the energy efficiency of AI accelerator systems. With an AI engine built inside the buffer chip, the AXDIMM can perform parallel processing of multiple memory ranks (sets of DRAM chips) instead of accessing just one rank at a time, greatly enhancing system performance and efficiency. Since the module can retain its traditional DIMM form factor, the AXDIMM facilitates drop-in replacement without requiring system modifications. Currently being tested on customer servers, the AXDIMM can offer approximately twice the performance in AI-based recommendation applications and a 40% decrease in system-wide energy usage.

“SAP has been continuously collaborating with Samsung on their new and emerging memory technologies to deliver optimal performance on SAP HANA and help database acceleration,” said Oliver Rebholz, head of HANA core research & innovation at SAP. “Based on performance projections and potential integration scenarios, we expect significant performance improvements for in-memory database management system (IMDBMS) and higher energy efficiency via disaggregated computing on AXDIMM. SAP is looking to continue its collaboration with Samsung in this area.”

Mobile Memory That Brings AI From Data Center to Device

Samsung’s LPDDR5-PIM mobile memory technology can provide independent AI capabilities without data center connectivity. Simulation tests have shown that the LPDDR5-PIM can more than double performance while reducing energy usage by over 60% when used in applications such as voice recognition, translation and chatbot.

Energizing the Ecosystem

Samsung plans to expand its AI memory portfolio by working with other industry leaders to complete standardization of the PIM platform in the first half of 2022. The company will also continue to foster a highly robust PIM ecosystem in assuring wide applicability across the memory market.

“By mass producing next-generation HBM2 DRAM, we can contribute much more to the rapid adoption of next-generation HPC systems by global IT companies,” said Sewon Chun, senior vice president, Memory Marketing, Samsung Electronics. “Also, in using our 3D memory technology here, we can more proactively cope with the multifaceted needs of global IT, while at the same time strengthening the foundation for future growth of the DRAM market.”

The newly introduced 4GB HBM2 DRAM, which uses Samsung’s most efficient 20-nanometer process technology and advanced HBM chip design, satisfies the need for high performance, energy efficiency, reliability and small dimensions making it well suited  for next-generation HPC systems and graphics cards.

Following Samsung’s introduction of a 128GB 3D TSV DDR4 registered dual inline memory module (RDIMM) last October, the new HBM2 DRAM marks the latest milestone in TSV (Through Silicon Via) DRAM technology.

The 4GB HBM2 package is created by stacking a buffer die at the bottom and four 8-gigabit (Gb) core dies on top. These are then vertically interconnected by TSV holes and microbumps. A single 8Gb HBM2 die contains over 5,000 TSV holes, which is more than 36 times that of a 8Gb TSV DDR4 die, offering a dramatic improvement in data transmission performance compared to typical wire-bonding based packages.

Samsung’s new DRAM package features 256GBps of bandwidth, which is double that of a HBM1 DRAM package. This is equivalent to a more than seven-fold increase over the 36GBps bandwidth of a 4Gb GDDR5 DRAM chip, which has the fastest data speed per pin (9Gbps) among currently manufactured DRAM chips. Samsung’s 4GB HBM2 also enables enhanced power efficiency by doubling the bandwidth per watt over a 4Gb-GDDR5-based solution, and embeds ECC (error-correcting code) functionality to offer high reliability.

In addition, Samsung plans to produce an 8GB HBM2 DRAM package within this year. By specifying 8GB HBM2 DRAM in graphics cards, designers will be able to enjoy a space savings of more than 95 percent, compared to using GDDR5 DRAM, offering more optimal solutions for compact devices that require high-level graphics computing capabilities.

The company will steadily increase production volume of its HBM2 DRAM over the remainder of the year to meet anticipated growth in market demand for network systems and servers. Samsung will also expand its line-up of HBM2 DRAM solutions to stay ahead in the high-performance computing market and extend its lead in premium memory production.

Samsung Electronics announced the introduction of the Samsung 950 PRO solid state drive (SSD), designed to meet the demands of high-performance consumer and business laptops and PCs. The drive’s M.2 form factor means that users with ultra-slim notebook PCs and workstations can benefit from industry-leading storage endurance, reliability and energy efficiency.

The Samsung 950 PRO SSD is Samsung’s first consumer-ready Non-Volatile Memory Express (NVMe*) M.2 form factor SSD with vertical NAND (V-NAND) technology; supporting the Peripheral Component Interconnect Express (PCIe) 3.0 interface. With the introduction of NVMe, the first protocol optimized for SSDs, users of the Samsung 950 PRO will benefit from improved performance and power saving which can help increase battery life and potentially reduce operating costs. The drive is ideal for professionals who want cutting-edge performance, higher bandwidth and lower latency from their high-end PCs and workstations, for projects such as computer-aided design, data analysis and engineering simulation. The compact M.2 2280 form factor ensures compatibility with next-generation desktop and mobile platforms that support the M.2 PCIe slot and interface.

“With the introduction of the 950 PRO using NVMe and PCIe, Samsung is able to provide our customers with the memory needed to handle the increased storage demands of tomorrow’s computing systems,” said Un-Soo Kim, Senior Vice President of Branded Memory, Memory Business at Samsung Electronics. “Consumers and businesses alike can experience enterprise-quality performance and benefits such as speed, endurance and energy efficiency to support the most demanding applications. The 950 PRO is yet another example of a branded memory solution that continues to elevate our portfolio of products and reflects Samsung’s continued leadership in the memory industry.”

Featuring the PCIe Gen.3 x4 interface and supporting the NVMe protocol, the Samsung 950 PRO offers improved random and sequential performance over Serial Advanced Technology Attachment (SATA) interface drives utilizing the legacy Advanced Host Controller Interface (AHCI) protocol. Users of applications that benefit from high input/output operations per second (IOPS) will experience up to four times faster performance than with traditional SATA SSDs.

The 950 PRO will be available in 512 gigabyte (GB) and 256GB storage capacities. The 512GB version delivers sequential read/write speeds of up to 2,500 MB/s and 1,500 MB/s. Random read performance is up to 300,000 IOPS, with write speeds of up to 110,000 IOPS. It features Samsung’s second generation MLC V-NAND 32-layer 128Gb die with UBX controller and magician software.

The drive was built to last, with AES 256-bit Full Disk Encryption to protect data and Dynamic Thermal Guard, which can protect the device and data in inclement weather from 0 to 70 degrees Celsius. It can also withstand physical shock of up to 1500G/0.5ms and vibrations up to 20G.

Both capacities come with a 5-year limited warranty up to 200 terabytes written (TBW) for the 256GB and 400TBW for the 512GB. The 950 PRO will be available beginning in October 2015, with an MSRP of $199.99 for the 256GB capacity and $349.99 for the 512GB capacity. For more information, please visit www.samsung.com/950PRO.