The new facility will manufacture products based on advanced process technologies for application in areas such as mobile, 5G, high-performance computing (HPC) and artificial intelligence (AI). Samsung remains committed to supporting customers globally by making advanced semiconductor fabrication more accessible and meeting surging demand for leading-edge products.

“As we add a new facility in Taylor, Samsung is laying the groundwork for another important chapter in our future,” said Kinam Kim, Vice Chairman and CEO, Samsung Electronics Device Solutions Division. “With greater manufacturing capacity, we will be able to better serve the needs of our customers and contribute to the stability of the global semiconductor supply chain.”

“We are also proud to be bringing more jobs and supporting the training and talent development for local communities, as Samsung celebrates 25 years of semiconductor manufacturing in the U.S.,” Kim said.

“In addition to our partners in Texas, we are grateful to the Biden Administration for creating an environment that supports companies like Samsung as we work to expand leading-edge semiconductor manufacturing in the U.S.,” continued Kim. “We also thank the administration and Congress for their bipartisan support to swiftly enact federal incentives for domestic chip production and innovation.”

Groundbreaking will be in the first half of 2022 with the target of having the facility operational in the second half of 2024. The Taylor site will span more than 5 million square meters and is expected to serve as a key location for Samsung’s global semiconductor manufacturing capacity along with its latest new production line in Pyeongtaek, South Korea.

The total expected investment of $17 billion, including buildings, property improvements, machinery and equipment, will mark the largest-ever investment made by Samsung in the U.S. This will also bring Samsung’s total investment in the U.S. to more than $47 billion since beginning operations in the country in 1978, where the company now has over 20,000 employees across the country.

“Companies like Samsung continue to invest in Texas because of our world-class business climate and exceptional workforce,” said Governor Abbott. “Samsung’s new semiconductor manufacturing facility in Taylor will bring countless opportunities for hardworking Central Texans and their families and will play a major role in our state’s continued exceptionalism in the semiconductor industry. I look forward to expanding our partnership to keep the Lone Star State a leader in advanced technology and a dynamic economic powerhouse.”

After reviewing multiple locations within the U.S. for a potential manufacturing site, the decision to invest in Taylor was based on multiple factors, including the local semiconductor ecosystem, infrastructure stability, local government support and community development opportunities. In particular, the proximity to Samsung’s current manufacturing site in Austin, about 25 kilometers southwest of Taylor, allows the two locations to share the necessary infrastructure and resources.

This latest expansion of Samsung’s U.S. presence is expected to create over 2,000 high-tech jobs directly and thousands of related jobs once the new facility is in full operation. As part of its co-investment in the community, Samsung will also contribute financial support to create a Samsung Skills Center for the Taylor Independent School District (ISD) to help students develop skills for future careers as well as providing internships and recruiting opportunities.

(left to right) Senator John Cornyn, Governor Greg Abbott, Samsung Electronics Vice Chairman & CEO Kinam Kim

(left to right) Governor Greg Abbott, Samsung Electronics Vice Chairman & CEO Kinam Kim

(left to right) Senator John Cornyn, Governor Greg Abbott, Samsung Electronics Vice Chairman & CEO Kinam Kim

Plugs with Pins and Protection from Dings

Semiconductor packaging involves enclosing integrated circuits (IC) in a form factor that can fit into a specific device. Since a semiconductor chip, or IC, is mounted on a circuit board or used in an electronic device, it needs to go through an electrical packaging process to be molded into the appropriate design and form.

If the IC were the human brain, its packaging would be the nervous system and skeletal structure.

In other words, semiconductor packaging serves a variety of purposes: ensuring the inter-terminal connection, supplying electricity, and providing heat resistance and protection for the IC. The packaging also ensures protection from external factors, including humidity, chemicals, impact and vibration.

Now, let’s take a look at how the packaging process works.

First, wafers are cut into individual chips with a diamond cutter. Faulty chips marked during the inking process are left behind while functional chips are placed on a lead frame or PCB (Printed Circuit Board), which are then attached with balls that provide an electrical connection.

The lead frame delivers electrical signals between the semiconductor chip and the board while offering structural support to protect the chip from external humidity or impact. Chips are connected to the lead frame with fine gold wires in a process called wire bonding.

After the chips are attached to the lead frames, they undergo the molding process, which gives them their exterior shells. At this stage, intense heat is applied to an epoxy molding compound (EMC) made of resin, which is liquefied and shaped into the desired form.

At last, the semiconductor chips resemble the ones we see inside our electronic devices.

The Last Stretch: Package Testing

Once the packaging process is complete, we have to determine if the package works properly. So, it’s time to move on to the last stage, the package test, in which our packaged semiconductor goes through the final quality assurance procedures.

The semiconductor chips are put in a device where they are tested under various conditions of voltage, electrical signals and temperature. In doing so, we can measure their electrical and functional characteristics as well as their performance to detect any defects.

We also collect and analyze the data accumulated during the test and give feedback to the teams overseeing the manufacturing and assembly processes to further improve the quality of our products.

Below is an example of the test procedures for DRAM (Dynamic Random Access Memory).

1. Assembly Out

A “lot card” is filled out with all the information related to the product, such as type, quantity, number of I/O (bits), process details and owner. The lot card follows the product from beginning to end, and is even kept for a period of time after the product’s release.

2. DC Test & Loading/ Burn-in (& Unloading)

Completed chips go through a DC test where defective units are sorted and removed, while potentially faulty chips are identified in high-stress environments, such as high voltage, high temperature and electric signals, during the burn-in process. The selected functional chips will go through another round of subsequent tests to ensure the level of reliability required for our products is met.

3. MBT (Monitoring Burn-in Tester)

The monitoring burn-in tester (MBT) process is an advanced version of the burn-in test previously mentioned, with the added advantages of a shorter test time and more rigorous testing criteria.

4. Post Burn-in Test

The products that have made it this far are now subject to the post burn-in test, where we test their electrical characteristics and functions at room temperature and below.

5. Final Test

We’re almost there! The final test examines the products’ electrical characteristics and functions at high temperatures.

After going through the strenuous process of the package test, the semiconductor chip finally gets its own identification; the name of the IC, date and origin of manufacture, product characteristics and serial number are printed on the product surfaces.

As we ship the completed products to our customers, we go the extra mile to ensure quality assurance by only sending the products that pass our pre-shipment testing.

Well, there you have it. If you look around, you will realize that semiconductors are everywhere– not just inside the IT devices you’re holding, but also in almost every kind of electronic device imaginable. Each and every one of these semiconductor chips goes through the extensive, complex and delicate process you’ve just learned about.

Amazing, huh? We think so, too.

In Korean, http://samsungsemiconstory.com/225.

It’s been a lengthy process, and we’ve just about completed the fabrication of our semiconductor, but in order to see if our hard work has paid off, we must look at the yield, or the percentage of functional chips out of the total chips designed on a single wafer.

Making the Cut

Generally, the higher the yield, the higher the productivity, so it is very important to keep the yield rate high. To ensure this is possible, several factors are of utmost importance, such as the cleanliness of the cleanroom, the accuracy of the processing equipment and the conditions of each process.

After semiconductor chips undergo the numerous processes mentioned in the previous episodes of this series, they will then be subject to strings of tests such as the electrical die sorting (EDS) test when the wafer fabrication process is complete, the packaging test after back-end processing, and a final quality test before the product is shipped to customers.

Let’s dig a bit deeper into the EDS process, which verifies that each chip that leaves the facilities meets the standards of the manufacturer.

The EDS Process: Increasing the Odds

EDS, or Electrical Die Sorting, begins with electrical testing to check whether chips meet the processing center’s required quality level. Processing continues with functional or repairable chips while defective chips are marked with a dot of ink—a process known as inking—and are discarded.

EDS testing helps detect problems during wafer fabrication or design processes so as to give feedback to the processing and design teams.

Here are the five stages of the EDS process.

1. ET (Electrical Test) & WBI (Wafer Burn-In)

During the electrical test, attributes such as DC voltage and the electric current parameters of individual semiconductor elements (like transistor, resistance, capacitor and diode, for example) are examined.

The subsequent wafer burn-in (WBI) process is an effective way to diminish defects at the initial stage of production, which enhances the reliability of the final product. First, heat is applied to the wafer at a certain temperature. Then, AC/DC voltage is applied to detect the potential causes of defect.

2. Pre-Laser (Hot/Cold)

In this process, electrical signals determine whether each chip on the wafer is functional or faulty. Repairable chips are stored for later processing. Thermal testing also takes place to catch defects that can occur at specific temperatures.

3. Laser Repair & Post-Laser 

Those same chips that were tagged for repairs in the previous process are then zapped by a laser beam to mend the discrepancies. Once the repair is complete, the chips are tested again in the post-laser process to ensure they were repaired properly.

4. Tape Laminate & Backgrinding

The tape laminate and backgrinding processes are required when assembling very thin products, such as IC cards that are used in transit cards or passports. The back side of the wafer is ground using a grinding wheel made up of fine diamond particles. This process files down the wafer, facilitating chip assembly. To protect the patterned surface of the wafer from dust and particles during the grinding process, a UV tape is laminated on the front surface of the wafer to create a protective layer. Once the grinding is complete, the tape is peeled off.

5. Inking 

The inking process, which we briefly touched on, allows the naked eye to easily distinguish defective chips by special ink marks that are made on the chips before and after the laser processes. Since the inked chips need not continue through the assembly and inspection processes, materials, equipment, time and manpower can be managed much more efficiently.

In the next episode, we’ll look into the packaging process, where our finished semiconductor chip is manipulated for protection from outside environments and maximum functionality. Stay tuned!

Transistors herald a revolutionary change

Shortly before Christmas in 1947, a revolutionary discovery was made at the Bell Laboratories in New Jersey. William Shockley, John Bardeen and Walter Brattain learned that when a piece of semiconductor in lattice structure makes contact with conductive wires, electric signals are amplified. This finding led to a series of experiments, and the transistor, which was referred to as an amplifier in the early days, was born.

Transistors were first used in hearing aids and radios to amplify sound by boosting electric currents. They soon became a core element of many electronic goods. However, with time, electronics became more complex in their functions and so did their internal structures, resulting in a number of various setbacks.

A breakthrough occurred in 1958 when the complex electronic parts were put together in the form of a complex electronic circuit on a microscopic scale. These structures were named integrated circuits (IC).

Integrated Circuits (IC)

Numerous transistors, diodes, resistors and capacitors are part of an integrated circuit, and are connected to each other seamlessly. These components respectively play different roles in processing and storing electric signals.

Transistors serve as a power switch, and capacitors store energy electrostatically in an electric field, just like a warehouse. Resistors control the current flow to other components while diodes manage the direction of that flow.

To fabricate an IC, a very minute and complex pattern on which all the circuitry are designed, is transferred onto multiple layers of materials. The transferring process utilizes photomasks that capture the miniaturized version of this pattern, just like film used for photographic printing.

If you’re curious about this photolithography process, we’ve got you covered; we’ll get to it in Part 4 of the series next week.

In Korean, http://www.samsungsemiconstory.com/133.