Samsung Electronics, a world leader in advanced semiconductor technology, today hosted Samsung Foundry Forum (SFF) 2023 Europe and unveiled its advanced and wide ranging automotive process solutions, from the most advanced 2-nanometer process to the 8-inch legacy process.

Alongside its customers and Samsung Advanced Foundry Ecosystem (SAFE) partners, Samsung Electronics showcased the latest technological trends and its business strategy tailored to the European market.

“Samsung Foundry is driving innovation in next-generation solutions to build an expanded portfolio that meets the growing needs of our automotive customers, especially as the era of electric vehicles becomes a reality,” said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics. “We are strengthening our readiness to provide customers with distinguished service across a variety of solutions, including power semiconductors, microcontrollers and advanced AI chips for autonomous driving.”

Since participating in IAA Mobility 2023 for the first time in September, Samsung Electronics is strengthening engagement and partnership in specialty processes for automotive customers in the European market, further solidifying its status as a leading foundry partner for the industry.

Pioneering New Applications With Industry’s Most Advanced eMRAM

In order to meet the needs of the latest advancements in the automotive market, Samsung is setting out to develop the industry’s first 5-nanometer eMRAM for next-generation automotive technology. eMRAM is a next-generation memory semiconductor used for automotive applications that enables high read and write speeds as well as superior heat resistance.

Since developing and mass producing the industry’s first 28nm FD-SOI¹ based eMRAM in 2019, Samsung Electronics has been developing 14nm for the FinFET process based on AEC-Q100 Grade 1. Samsung Foundry plans to expand its eMRAM portfolio by adding 14nm by 2024, 8nm by 2026, and 5nm by 2027.

Samsung’s 8nm eMRAM shows potential to deliver a 30% increase in density and 33% increase in speed, compared to the 14nm process.

Tackling the Market With Automotive Process Solutions From Cutting-Edge to Legacy

The company announced its advanced process roadmap, highlighting its plans to complete mass production readiness for its 2nm process for automotive applications by 2026.

Samsung Electronics is also bolstering its readiness to serve customer needs by expanding its 8-inch BCD (Bipolar-CMOS-DMOS) process portfolio. The BCD process combines the strengths of three different process technologies: Bipolar (B), CMOS (C), and DMOS (D) on one chip and is most commonly used in the production of power semiconductors.

Samsung Electronics plans to expand its current 130nm automotive BCD process to add 90nm by 2025. The 90nm BCD process is expected to bring a 20% decrease in chip area compared to the 130nm process.

Implementing Deep Trench Isolation (DTI) technology, which reduces the distance between each transistor to maximize the performance of power semiconductors, Samsung Foundry will be able to apply a greater voltage of 120V instead of 70V to a wider range of applications. This will enable readiness to provide a process development kit (PDK) that implements 120V to the 130nm BCD process by 2025.

Leading ‘Beyond-Moore’ Innovation Through Advanced Packaging Alliance

Samsung established a Multi-Die Integration (MDI) Alliance by collaborating with its SAFE partners as well as major players in memory, package substrate, and testing.

As part of an industry-wide partnership with 20 partners, Samsung is leading the development of 2.5D and 3D packaging solutions customized for all applications from automotive to high-performance computing (HPC).

Samsung Electronics hosted the annual Samsung Foundry Forum 2023 in the United States on June 27-28, in South Korea on July 4, and in Japan on October 17. The content from the forum will be available on the Samsung Semiconductor website for worldwide access to all visitors beginning November 2.

¹ Fully Depleted Silicon On Insulator (FD-SOI) is a planar process technology that implements an impervious insulating film (SiO2) on top of a silicon wafer and builds transistors on top of it to minimize leakage.

▲ Integrated Ambarella CV3-AD685 system-on-chip built on Samsung Foundry’s 5nm technology

Samsung Electronics, a world leader in advanced semiconductor technology, and Ambarella, Inc. (NASDAQ: AMBA), an edge AI semiconductor company, today announced that Samsung’s Foundry business is providing its 5-nanometer (nm) process technology to Ambarella for its newly announced CV3-AD685 automotive AI central domain controller. This collaboration will help transform the next generation of autonomous driving vehicle safety systems by bringing new levels of AI processing performance, power and reliability.

The CV3-AD685 is the first production version of Ambarella’s CV3-AD family of automotive AI central domain controllers with Tier-1 automotive suppliers announcing they will offer solutions using the CV3-AD system-on-chip (SoC) product family. Samsung’s 5nm process technology is optimized for automotive-grade semiconductors with extremely tight process controls and advanced IP for exceptional reliability and outstanding traceability.

Ambarella will rely on Samsung’s 5nm process maturity and the technology’s solid track record. This 5nm process is backed by the company’s extensive experience in automotive foundry process, IP and service package development to enable manufacturers to create cutting-edge innovations in assisted and automated mobility.

“Ambarella and Samsung Foundry have a rich history of collaboration, and we are excited to bring their world-class 5nm technology to our new CV3-AD685 SoCs,” said Fermi Wang, President and CEO at Ambarella. “Samsung’s proven automotive process technology allows us to bring new levels of AI acceleration, systems integration and power efficiency to ADAS and L2+ through L4 autonomous vehicles.”

The CV3-AD685 integrates Ambarella’s next-generation CVflow^® AI engine, which includes neural network processing that is 20 times faster than the previous generation of Ambarella’s CV2 SoCs. It also provides general-vector and neural-vector processing capabilities to deliver the overall performance required for full autonomous driving (AD) stack processing, including computer vision, 4D imaging radar, deep sensor fusion and path planning.

“Samsung brings 5nm EUV FinFET technology to automotive applications for unprecedented ADAS and vision processor performance,” said Sang-Pil Sim, Executive Vice President and Head of Foundry Corporate Planning at Samsung Electronics. “With Tier-1 automotive suppliers already adopting the technology, we believe other automotive companies will also consider using the Ambarella CV3-AD SoC product family manufactured in Samsung’s 5nm process.”

The CV3-AD685 will be the first in the CV3-AD product family to use Samsung’s 5nm process, and this SoC integrates advanced image processing, a dense stereo and optical flow engine, ARM^® Cortex^® A78AE and R52 CPUs, an automotive GPU for visualizations, and a hardware security module (HSM). It features an “algorithm first” architecture that provides support for the entire autonomous-driving software stack.

The high-performance, power efficient and scalable CV3-AD family, which is built specifically for ADAS, complements a wide range of solutions for assisted driving while advancing vehicle automation. The integrated CV3-AD685 SoC enables information from various sensors to be fused for robust L2+ to L4 autonomous driving. Samsung Foundry’s industry-leading process technology and advanced 3D-packaging solutions are powering many of the latest mobile, HPC and automotive solutions.

Samsung’s 5nm process is also backed by the Samsung Advanced Foundry Ecosystem (SAFE) program. The SAFE program ensures close collaboration between Samsung Foundry, ecosystem partners and customers to deliver robust SoC designs based on certified key design components including Process Design Kits (PDK), reference flows with Design Methodologies (DM), a variety of Intellectual Properties (IP), and on-demand design support.

About Ambarella

Ambarella’s products are used in a wide variety of human vision and edge AI applications, including video security, advanced driver assistance systems (ADAS), electronic mirror, drive recorder, driver/cabin monitoring, autonomous driving and robotics applications. Ambarella’s low-power systems-on-chip (SoCs) offer high-resolution video compression, advanced image and radar processing and powerful deep neural network processing to enable intelligent perception, fusion and planning. For more information, please visit www.ambarella.com.

With significant market growth in high-performance computing (HPC), artificial intelligence (AI), 5/6G connectivity and automotive applications, demand for advanced semiconductors has increased dramatically, making innovation in semiconductor process technology critical to the business success of foundry customers. To that end, Samsung highlighted its commitment to bringing its most advanced process technology, 1.4-nanometer (nm), for mass production in 2027.

During the event, Samsung also outlined steps its Foundry Business is taking in order to meet customers’ needs, including: △foundry process technology innovation, △process technology optimization for each specific applications, △stable production capabilities and △customized services for customers.

▲ Dr. Siyoung Choi, president and head of Foundry Business at Samsung Electronics, is giving his keynote speech at Samsung Foundry Forum 2022.

“The technology development goal down to 1.4nm and foundry platforms specialized for each application, together with stable supply through consistent investment are all part of Samsung’s strategies to secure customers’ trust and support their success,” said Dr. Siyoung Choi, president and head of Foundry Business at Samsung Electronics. “Realizing every customer’s innovations with our partners has been at the core of our foundry service.”

Showcasing Samsung’s Advanced Node Roadmap Down to 1.4nm in 2027

With the company’s success of bringing the latest 3nm process technology to mass production, Samsung will be further enhancing gate-all-around (GAA) based technology and plans to introduce the 2nm process in 2025 and 1.4nm process in 2027.

While pioneering process technologies, Samsung is also accelerating the development of 2.5D/3D heterogeneous integration packaging technology to provide a total system solution in foundry services.

Through continuous innovation, its 3D packaging X-Cube with micro-bump interconnection will be ready for mass production in 2024, and bump-less X-Cube will be available in 2026.

▲ Dr. Siyoung Choi, president and head of Foundry Business at Samsung Electronics, is giving his keynote speech at Samsung Foundry Forum 2022.

Proportion of HPC, Automotive and 5G To Be More Than 50% by 2027

Samsung actively plans to target high-performance and low-power semiconductor markets such as HPC, automotive, 5G and the Internet of Things (IoT).

To better meet customers’ needs, customized and tailored process nodes were introduced during this year’s Foundry Forum. Samsung will enhance its GAA-based 3nm process support for HPC and mobile, while further diversifying the 4nm process specialized for HPC and automotive applications.

For automotive customers specifically, Samsung is currently providing embedded non-volatile memory (eNVM) solutions based on 28nm technology. In order to support automotive-grade reliability, the company plans to further expand process nodes by launching 14nm eNVM solutions in 2024 and adding 8nm eNVM in the future. Samsung has been mass producing 8nm RF following 14nm RF, and 5nm RF is currently in development.

‘Shell-First’ Operation Strategy To Respond to Customer Needs in a Timely Manner

Samsung plans to expand its production capacity for the advanced nodes by more than three times by 2027 compared to this year.

Including the new fab under construction in Taylor, Texas, Samsung’s foundry manufacturing lines are currently in five locations: Giheung, Hwaseong and Pyeongtaek in Korea; and Austin and Taylor in the United States.

At the event, Samsung detailed its ‘Shell-First’ strategy for capacity investment, building cleanrooms first irrespective of market conditions. With cleanrooms readily available, fab equipment can be installed later and set up flexibly as needed in line with future demand. Through the new investment strategy, Samsung will be able to better respond to customers’ demands.

Investment plans in a new ‘Shell-First’ manufacturing line in Taylor, following the first line announced last year, as well as potential expansion of Samsung’s global semiconductor production network were also introduced.

Expanding the SAFE Ecosystem To Strengthen Customized Services

Following the ‘Samsung Foundry Forum,’ Samsung will hold the ‘SAFE Forum’ (Samsung Advanced Foundry Ecosystem) on October 4th. New foundry technologies and strategies with ecosystem partners will be introduced encompassing areas such as Electronic Design Automation (EDA), IP, Outsourced Semiconductor Assembly and Test (OSAT), Design Solution Partner (DSP) and the Cloud.

In addition to 70 partner presentations, Samsung Design Platform team leaders will introduce the possibility of applying Samsung’s processes such as Design Technology Co-Optimization for GAA and 2.5D/3DIC.

As of 2022, Samsung provides more than 4,000 IPs with 56 partners, and is also cooperating with nine and 22 partners in the design solution and EDA, respectively. It also offers cloud services with nine partners and packaging services with 10 partners.

Along with its ecosystem partners, Samsung provides integrated services that support solutions from IC design to 2.5D/3D packages.

Through its robust SAFE ecosystem, Samsung plans to identify new fabless customers by strengthening customized services with improved performance, rapid delivery and price competitiveness, while actively attracting new customers such as hyperscalers and start-ups.

Starting in the United States (San Jose) on October 3rd, the ‘Samsung Foundry Forum’ will be sequentially held in Europe (Munich, Germany) on the 7th, Japan (Tokyo) on the 18th and Korea (Seoul) on the 20th, through which customized solutions for each region will be introduced. A recording of the event will be available online from the 21st for those who were unable to attend in person.

Samsung Electronics, a world leader in advanced semiconductor technology, held its 3^rd Annual Samsung Advanced Foundry Ecosystem (SAFE^TM) Forum 2021 virtually today.

With the theme of ‘Performance Platform 2.0: Innovation, Intelligence, Integration’, Samsung and its foundry ecosystem partners prepared 7 plenary talks and 76 technology sessions focused on three main topics: Gate-All-Around (GAA, Innovation), Artificial Intelligence (AI, Intelligence) and 2.5D/3D (Integration) technologies and the diverse design infrastructures required for high-performance applications.

“In the rapidly changing data-centric era, Samsung and its foundry partners have made great strides responding to increasing customers demand and to support their success by providing powerful solutions,” said Ryan Lee, Senior Vice President and Head of Foundry Design Platform Development at Samsung Electronics. “With the support of our SAFE program, Samsung will lead the realization of the vision ‘Performance Platform 2.0’.”

Starting with a keynote live streaming on November 17, attendees are able to explore a variety of tech sessions and engage with ecosystem partners through the virtual SAFE Forum platform for a month. To register for SAFE forum, please visit https://www.samsungfoundry.com.

SAFE 2021: Performance Platform 2.0

Samsung has concentrated on expanding its foundry ecosystem by focusing on IP, Electronic Design Automation (EDA), Cloud, Design Solution Partner (DSP) and Package solutions necessary for today’s data-driven era. Samsung introduced today its latest SAFE^TM program including:

• SAFE^TM-IP & EDA: Samsung and its foundry ecosystem have reserved over 3,600 IPs and 80 certified EDA tools respectively. These are developed and verified based on the high-standard certification program run by Samsung and participated in by our partners. In order to respond to the demands of high performance applications, Samsung’s foundry ecosystem has developed not only HPC-specific foundation IPs including standard cell libraries and memory compilers but also key IPs, such as over 100Gbps Serializer-Deserializer (SerDes) interface and 2.5D/3D multi-die integration solutions.
  
  With our EDA partners, Samsung has secured design tools optimized for its unique 3-nanometer (nm) GAA process technology and design methodology for integrating multiple dies in 2.5D/3D. Customers can also utilize AI- and machine learning-based EDA technology to systematically manage and analyze design data. To overcome the increasing difficulties of chip design and analysis, Samsung has strengthened cooperation with partners to develop EDA tools and related technologies, such as incorporating GPUs that can efficiently use computing resources required for chip verification.

• SAFE^TM-OSAT: Samsung plans to lead ‘beyond-Moore’ technologies by strengthening various package line-ups such as 2.5D/3D through the expansion of its SAFE-Outsourced Semiconductor Assembly and Test (OSAT) ecosystem. The recent announcement of the co-development of Hybrid-Substrate Cube (H-Cube) solution, which offers efficient integration of 6 HBMs and cost benefit, is one of the successful examples of Samsung foundry’s collaboration with the OSAT community.

• SAFE^TM-Cloud Design Platform: SAFE^TM-CDP, the cloud-based one-stop design platform introduced last year, now supports a hybrid cloud function that can be linked to customers’ conventional design environments.

• SAFE^TM-DSP: Through the SAFE^TM-DSP ecosystem, Samsung and its global partners can actively support global fabless companies to implement their design ideas into custom product by utilizing cutting-edge process technologies as well as high-performance, low-power chip design knowledge.

[Quote from SAFE^TM Partner companies]

• Ansys, Ajei Gopal, CEO

“Today’s chips demand a full multiphysics approach, which requires engineering simulation. Ansys is proud to partner with Samsung to deliver a comprehensive multi-physics analysis flow for Samsung’s multi-die integration initiative. The benefits to joint customers, to the industry – and to the entire world – are tremendous. Semiconductors will drive innovations as varied as autonomous and electric vehicles, artificial intelligence, and mobile technologies, including 5G and beyond.”

• Arm, Simon Segars, CEO

“Our longstanding partnership with Samsung Foundry has been essential for growing business opportunities in many markets for our combined partner ecosystem. This close collaboration continues as we work together to optimize our Armv9 next-generation processors on Samsung Foundry’s leading-edge processes, including GAA, to deliver a best-in-class solution that is optimized for the world of today, and the technologies of tomorrow. Together, we are unlocking new opportunities across HPC, Automotive, AI, and IoT, while also managing rising complexities, enabling faster time to market.”

• Cadence, Lip-Bu Tan, CEO

“The Cadence Intelligent System Design strategy is very well-aligned with Samsung Foundry’s Performance Platform 2.0 with common themes of innovation, pervasive intelligence and integrated solutions. Together, we’re enabling customers to develop and deliver innovative, breakthrough products using Samsung’s most advanced process and packaging technologies, and we look forward to continuing our work with Samsung Foundry to accelerate design successes”

• Siemens EDA, A. J. Incorvaia, Senior Vice President

“The Samsung SAFE event provides an exceptionally valuable venue for the Samsung Foundry ecosystem to meet, share information and identify opportunities to fully leverage Samsung’s cutting-edge process technologies. Siemens EDA looks forward to this year’s Samsung SAFE event and the many opportunities it presents for collaborating with customers and partners to eliminate design obstacles and enhance silicon success.”

• Synopsys, Sassine Ghazi, president and COO

“We see exciting times ahead as software and chip technology come together to create world-changing new products,” said Sassine Ghazi, president and COO of Synopsys. “We have strong programs with Samsung Foundry on 3nm gate-all-around enablement, broad IP certification, AI-assisted chip design and 2.5/3D multi-die design to name just a few. We welcome the strong collaboration opportunities offered by the Samsung SAFE initiative.”

Samsung Electronics, a world leader in advanced semiconductor technology, today unveiled plans for continuous process technology migration to 3- and 2-nanometer (nm) based on the company’s Gate-All-Around (GAA) transistor structure at its 5^th annual Samsung Foundry Forum (SFF) 2021.

With a theme of Adding One More Dimension, the multi-day virtual event is expected to draw over 2,000 global customers and partners. At this year’s event, Samsung will share its vision to bolster its leadership in the rapidly evolving foundry market by taking each respective part of foundry business to the next level: process technology, manufacturing operations and foundry services.

“We will increase our overall production capacity and lead the most advanced technologies while taking silicon scaling a step further and continuing technological innovation by application,” said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics.” Amid further digitalization prompted by the COVID-19 pandemic, our customers and partners will discover the limitless potential of silicon implementation for delivering the right technology at the right time.”

GAA Is Ready for Customers’ Adoption – 3nm MP in 2022, 2nm in 2025

With its enhanced power, performance and flexible design capability, Samsung’s unique GAA technology, Multi-Bridge-Channel FET (MBCFET^TM), is essential for continuing process migration. Samsung’s first 3nm GAA process node utilizing MBCFET will allow up to 35 percent decrease in area, 30 percent higher performance or 50 percent lower power consumption compared to the 5nm process. In addition to power, performance and area (PPA) improvements, as its process maturity has increased, 3nm’s logic yield is approaching a similar level to the 4nm process, which is currently in mass production.

Samsung is scheduled to start producing its customers’ first 3nm-based chip designs in the first half of 2022, while its second generation of 3nm is expected in 2023. Newly added to Samsung’s technology roadmap, the 2nm process node with MBCFET is in the early stages of development with mass production in 2025.

FinFET for CIS, DDI, MCU – 17nm Specialty Process Technology Debuts

Samsung Foundry is continuously improving its FinFET process technology to support specialty products with cost-effective and application-specific competitiveness. A good example of this is the company’s 17nm FinFET process node. In addition to the intrinsic benefits afforded by FinFET, the process node has excellent performance and power efficiency leveraging a 3D transistor architecture. Consequently, Samsung’s 17nm FinFET provides up to 43 percent decrease in area, 39 percent higher performance or a 49 percent increase in power efficiency compared to the 28nm process.

Additionally, Samsung is advancing its 14nm process in order to support 3.3V high voltage or flash-type embedded MRAM (eMRAM) which enables increased write speed and density. It will be a great option for applications such as micro controller units (MCUs), IoT and wearables. Samsung’s 8nm radio frequency (RF) platform is expected to expand the company’s leadership in the 5G semiconductor market from sub-6GHz to mmWave applications.

Looking ahead, in cooperation with its ecosystem partners, Samsung Foundry’s SAFE Forum will be held virtually in November 2021.

The new foundry line, which will focus on EUV-based 5 nanometer (nm) and below process technology, has just commenced construction this month and is expected to be in full operation in the second half of 2021. It will play a pivotal role as Samsung aims to expand the use of state-of-the-art process technologies across a myriad of current and next generation applications, including 5G, high-performance computing (HPC) and artificial intelligence (AI).

“This new production facility will expand Samsung’s manufacturing capabilities for sub-5nm process and enable us to rapidly respond to the increasing demand for EUV-based solutions,” said Dr. ES Jung, President and Head of Foundry Business at Samsung Electronics. “We remain committed to addressing the needs of our customers through active investments and recruitment of talents. This will enable us to continue to break new ground while driving robust growth for Samsung’s foundry business.”

Following the initial mass production of the EUV-based 7nm process in early 2019, Samsung recently added a new EUV-dedicated V1 line in Hwaseong, Korea, to its global foundry network. With the new Pyeongtaek facility starting full operation in 2021, Samsung’s foundry capacity based on EUV is expected to increase significantly.

Samsung is scheduled to start mass production of 5nm EUV process in the Hwaseong fab in the second half of this year.

With the addition of the Pyeongtaek fab, Samsung will have a total of seven foundry production lines located in South Korea and the United States, comprised of six 12-inch lines and one 8-inch line.

Samsung Electronics, a world leader in advanced semiconductor technology, today announced that its new cutting-edge semiconductor fabrication line in Hwaseong, Korea, has begun mass production.

The facility, V1, is Samsung’s first semiconductor production line dedicated to the extreme ultraviolet (EUV) lithography technology and produces chips using process node of 7 nanometer (nm) and below. The V1 line broke ground in February 2018, and began test wafer production in the second half of 2019. Its first products will be delivered to customers in the first quarter.

“Along with technology leadership and design infrastructure, manufacturing excellence is one of the most important elements of the foundry business,” said Dr. ES Jung, President and Head of Foundry Business at Samsung Electronics. “As we ramp up production, the V1 line will enhance our ability to respond to market demand and expand opportunities to support our customers.”

The V1 line is currently producing state-of-the-art mobile chips with 7 and 6nm process technology and will continue to adopt finer circuitry up to the 3nm process node.

By the end of 2020, the cumulative total investment in the V1 line will reach USD 6 billion in accordance with Samsung’s plan and the total capacity from 7nm and below process node is expected to triple from that of 2019. Together with the S3 line, the V1 line is expected to play a pivotal role in responding to fast-growing global market demand for single-digit node foundry technologies.

As semiconductor geometries grow smaller, the adoption of EUV lithography technology has become increasingly important, as it enables scaling down of complex patterns on wafers and provides an optimal choice for next-generation applications such as 5G, AI, and Automotive.

With the V1 line in operation, Samsung now has a total of six foundry production lines in South Korea and the United States, including five 12-inch lines and one 8-inch line. (see below)

* Global manufacturing sites of Samsung foundry

Samsung attracted more than 200 industry experts from fabless companies and foundry partners, and 16 partner booths displayed advanced foundry technology trends, a significant increase in both numbers compared to last year, representing a more solid customer base of Samsung Foundry as well as greater collaboration in Europe, Middle East, and Africa (EMEA).

Since the EMEA semiconductor market is in demand across a wide range of applications including automotive, consumer, network, and internet-of things (IoT), Samsung introduced various specialty technologies, such as FD-SOI, radio frequency (RF), and embedded memory along with comprehensive portfolio of foundry process nodes.

Samsung Electronics showcased its state-of-the-art foundry platforms that bring together essential technical elements for new-age applications, including 5G, IoT, automotive, and high performance computing (HPC), while expanding its design solution partners to improve global customers’ access to Samsung’s foundry solutions.

“It is a great honor to host our global foundry forum with increasing number of attendees every year. The forum has helped us work closely with our customers and strengthen Samsung’s foundry ecosystem,” said Dr. ES Jung, president and head of foundry business at Samsung Electronics, in the keynote speech. “We will strive to get more customer trust and be the best partner possible to prepare for the future with.”

Given the robustness of the European automotive industry, the foundry platform for automotive semiconductor market is drawing considerable attention, and is expected to rapidly grow to address the increasing demand in the autonomous and electric vehicle market.

Samsung is currently producing several automotive semiconductor products such as driving assistant and infotainment systems, mainly based on its 28-nanometer (nm) FD-SOI and 14nm process nodes. In order to respond to increasing customer inquiries, Samsung plans to expand its automotive process nodes to 8nm in near future.

Samsung is also focusing on functional safety and component reliability, which are critically important in the automotive industry, since any failure could cause serious consequences of accident or injury.

Samsung has already proven its ability to design IPs to meet the required automotive standard, and received the ISO 26262 certification for functional safety in automotive components from TÜV Rheinland. Complying with reliability standard AEC-Q100 and IATF 16969 quality management system, it is also preparing for automotive semiconductor production.

Meanwhile, in cooperation with ecosystem partners, Samsung will host its first SAFE (Samsung Advanced Foundry Ecosystem) Forum on Oct 17 in San Jose, to introduce Samsung’s IP, Electronic Design Automation (EDA), and packaging solutions in detail for foundry partners.

The event, held today in Santa Clara, California, features top Samsung executives and industry experts reviewing progress on semiconductor technologies and foundry platform solutions that enable developments in artificial intelligence (AI), machine learning, 5G networking, automotive, the Internet of Things (IoT), advanced data centers and many other domains.

“We stand at the verge of the Fourth Industrial Revolution, a new era of high-performance computing and connectivity that will advance the daily lives of everyone on the planet,” said Dr. ES Jung, President and head of Foundry Business at Samsung Electronics.

“Samsung Electronics fully understands that achieving powerful and reliable silicon solutions requires not only the most advanced manufacturing and packaging processes as well as design solutions, but also collaborative foundry-customer relationships grounded on trust and shared vision. This year’s Foundry Forum is filled with compelling evidence of our commitment to progress in all those areas, and we’re honored to host and converse with our industry’s best and brightest,” Dr. Jung added.

Highlights from the U.S. Foundry Forum include:

The New 3nm GAE PDK Version 0.1 is Ready

Samsung’s 3nm Gate-All-Around (GAA) process, 3GAE, development is on track. The company noted today that its Process Design Kit (PDK) version 0.1 for 3GAE has been released in April to help customers get an early start on the design work and enable improved design competitiveness along with reduced turnaround time (TAT).

Compared to 7nm technology, Samsung’s 3GAE process is designed to provide up to a 45 percent reduction in chip area with 50 percent lower power consumption or 35 percent higher performance. The GAA-based process node is expected to be widely adopted in next-generation applications, such as mobile, network, automotive, Artificial Intelligence (AI) and IoT.

Conventional GAA based on nanowire requires a larger number of stacks due to its small effective channel width. On the other hand, Samsung’s patented version of GAA, MBCFET (Multi-Bridge-Channel FET), uses a nanosheet architecture, enabling greater current per stack.

While FinFET structures must modulate the number of fins in a discrete way, MBCFET provides greater design flexibility by controlling the nanosheet width. In addition, MBCFET’s compatibility with FinFET processes means the two can share the same manufacturing technology and equipment, which accelerates process development and production ramp-up.

Samsung recently taped out the 3GAE test vehicle design and will focus on improving its performance and power efficiency going forward.

For more information, please refer to the Newsroom links for GAA infographic and video clip.

The Launching of a New SAFE–Cloud Program

As part of its ongoing efforts to support and enhance customers’ entire design workflow, Samsung Electronics launched the Samsung Advanced Foundry Ecosystem Cloud (SAFE-Cloud) program. It will provide customers with a more flexible design environment through collaboration with major public cloud service providers, such as Amazon Web Services (AWS) and Microsoft Azure, as well as leading Electronic Design Automation (EDA) companies, including Cadence and Synopsys.

To date, most foundry customers have built and managed design infrastructure on their own servers. The SAFE-Cloud program reduces this burden and supports easier, faster and more efficient design efforts by providing an excellent turnkey design environment with extensive process information (PDK, design methodologies), EDA tools, design assets (IP, library) and design services.

Customers can be assured of as much server and storage space as they need, as well as a safe environment optimized for chip design, due to Samsung Electronics’ verification of SAFE-Cloud’s security, applicability and expandability.

Utilizing the SAFE-Cloud platform, Samsung was able to accelerate the development of its 7nm and 5nm cell libraries in collaboration with Synopsys. In addition, Samsung, Gaonchips – a fabless design company in Korea – and Cadence have successfully completed design verification based on the platform.

“Making up-front investments in high-performance computing (HPC) servers and systems can be a challenge for a company like us,” said Kyu Dong Jung, CEO of Gaonchips. “SAFE-Cloud offers us a very flexible design environment without requiring investment in additional infrastructure, as well as reduced design TAT. I expect this program to provide more tangible business and technical benefits to us and the entire fabless industry.”

Process Technology Roadmap and Advanced Packaging Updates  

Samsung’s roadmap includes four FinFET-based processes from 7nm down to 4nm that leverage extreme ultraviolet (EUV) technology as well as 3nm GAA, or MBCFET.

In the second half of this year, Samsung is scheduled to start the mass production of 6nm process devices and complete the development of 4nm process.

The product design of Samsung’s 5nm FinFET process, which was developed in April, is expected to be completed in the second half of this year and go under mass production in the first half of 2020.

Extensions of the company’s FD-SOI (FDS) process and eMRAM together with an expanded set of state-of-the-art package solutions were also unveiled at this year’s Foundry Forum. Development of the successor to the 28FDS process, 18FDS, and eMRAM with 1Gb capacity will be finished this year.

Compared to 7nm, Samsung’s 5nm FinFET process technology provides up to a 25 percent increase in logic area efficiency with 20 percent lower power consumption or 10 percent higher performance as a result of process improvement to enable us to have more innovative standard cell architecture.

In addition to power performance area (PPA) improvements from 7nm to 5nm, customers can fully leverage Samsung’s highly sophisticated EUV technology. Like its predecessor, 5nm uses EUV lithography in metal layer patterning and reduces mask layers while providing better fidelity.

Another key benefit of 5nm is that we can reuse all the 7nm intellectual property (IP) to 5nm. Thereby 7nm customers’ transitioning to 5nm will greatly benefit from reduced migration costs, pre-verified design ecosystem, and consequently shorten their 5nm product development.

As a result of the close collaboration between Samsung Foundry and its ‘Samsung Advanced Foundry Ecosystem (SAFE)’ partners, a robust design infrastructure for Samsung’s 5nm, including the process design kit (PDK), design methodologies (DM), electronic design automation (EDA) tools, and IP, has been provided since the fourth quarter of 2018. Besides, Samsung Foundry has already started offering 5nm Multi Project Wafer (MPW) service to customers.

“In successful completion of our 5nm development, we’ve proven our capabilities in EUV-based nodes,” said Charlie Bae, Executive Vice President of Foundry Business at Samsung Electronics. “In response to customers’ surging demand for advanced process technologies to differentiate their next-generation products, we continue our commitment to accelerating the volume production of EUV-based technologies.”

In October 2018, Samsung announced the readiness and its initial production of 7nm process, its first process node with EUV lithography technology. The company has provided commercial samples of the industry’s first EUV-based new products and has started mass production of 7nm process early this year.

Also, Samsung is collaborating with customers on 6nm, a customized EUV-based process node, and has already received the product tape-out of its first 6nm chip.

Mr. Bae continued, “Considering the various benefits including PPA and IP, Samsung’s EUV-based advanced nodes are expected to be in high demand for new and innovative applications such as 5G, artificial intelligence (AI), high performance computing (HPC), and automotive. Leveraging our robust technology competitiveness including our leadership in EUV lithography, Samsung will continue to deliver the most advanced technologies and solutions to customers.”

Samsung foundry’s EUV-based process technologies are currently being manufactured at the S3-line in Hwaseong, Korea. Additionally, Samsung will expand its EUV capacity to a new EUV line in Hwaseong, which is expected to be completed within the second half of 2019 and start production ramp-up from next year.

“Samsung started mass production of its 28FDS process technology last year and reached the desired process maturity earlier than originally scheduled,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “So far we have taped out more than 40 products based on the FD-SOI process for various customers. With the addition of RF and eMRAM on 28FDS and 18FDS technologies, we expect an increasing number of product engagements.”

Samsung eMRAM is the newest addition to the family of embedded non-volatile memories and it offers unprecedented speed, power and endurance advantages.

“By adding only three layers in the back-end of the process, we can simply integrate the new eMRAM cells into the existing baseline FD-SOI process,” said Gitae Jeong, Senior Vice President of the Advanced Technology Development Team at Samsung Electronics. “Combined with Samsung’s memory technology leadership and its differentiated FD-SOI technology, we finally succeeded in incorporating eMRAM into various commercial applications”

“Samsung is working with NXP on a test chip to deliver eMRAM macro capability which is optimized for embedded processor integration and manufacturing.” said Ron Martino, VP and GM for NXP’s iMX Applications Processor product line. “This test chip is complete and will produce results in the 4^th quarter. This work will further enable the vision of integrating diverse SOC components on a single SOC in a cost effective manner.”

Samsung has completed its full set of 28FDS technology eco-system solutions with various eco- system partners including Cadence and Synopsys. Customers can access Samsung certified 28FDS reference flows from Cadence and Synopsys along with application-specific IP offerings.

“Through our collaboration with Samsung, our mutual customers can access the 28FDS certified, comprehensive Cadence RTL-to-GDS reference flow,” said KT Moore, vice president, product management in the Digital & Signoff Group at Cadence. “The Cadence tools integrate the back-biasing and multi-bit flip-flop design optimization features included with the Samsung 28FDS process technology, enabling designers to quickly and easily develop high-quality SoCs with optimal power and performance.”

“Early joint collaboration on PDKs, reference flows and IP is a hallmark of the Samsung/Synopsys relationship,” said Michael Jackson, corporate vice president of marketing and business development for the Design Group at Synopsys. “For Samsung’s 28FDS, our mutual customers can design with confidence, knowing that it has been fully certified for Synopsys’ Design Platform and Design Ware® IP.

Details on the recent updates to Samsung Foundry’s cutting-edge process technology including FD-SOI technology roadmap and readiness will be presented at the Shanghai FD-SOI Forum on September 26^th, 2017, by ES Jung, Executive Vice President and General Manager of Foundry Business at Samsung Electronics.