Eight Major Steps to Semiconductor Fabrication, Part 8: Electrical Die Sorting (EDS)

on June 10, 2015
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In the previous part of our series, we explored the metal interconnect process which ensures a semiconductor’s electronic elements are well-connected so that the appropriate signals can reach where they need to.


It’s been a lengthy process, and we’ve just about completed the fabrication of our semiconductor, but in order to see if our hard work has paid off, we must look at the yield, or the percentage of functional chips out of the total chips designed on a single wafer.

Making the Cut



Generally, the higher the yield, the higher the productivity, so it is very important to keep the yield rate high. To ensure this is possible, several factors are of utmost importance, such as the cleanliness of the cleanroom, the accuracy of the processing equipment and the conditions of each process.


After semiconductor chips undergo the numerous processes mentioned in the previous episodes of this series, they will then be subject to strings of tests such as the electrical die sorting (EDS) test when the wafer fabrication process is complete, the packaging test after back-end processing, and a final quality test before the product is shipped to customers.


Let’s dig a bit deeper into the EDS process, which verifies that each chip that leaves the facilities meets the standards of the manufacturer.

The EDS Process: Increasing the Odds


EDS, or Electrical Die Sorting, begins with electrical testing to check whether chips meet the processing center’s required quality level. Processing continues with functional or repairable chips while defective chips are marked with a dot of ink—a process known as inking—and are discarded.


EDS testing helps detect problems during wafer fabrication or design processes so as to give feedback to the processing and design teams.


Here are the five stages of the EDS process.


1. ET (Electrical Test) & WBI (Wafer Burn-In)


During the electrical test, attributes such as DC voltage and the electric current parameters of individual semiconductor elements (like transistor, resistance, capacitor and diode, for example) are examined.


The subsequent wafer burn-in (WBI) process is an effective way to diminish defects at the initial stage of production, which enhances the reliability of the final product. First, heat is applied to the wafer at a certain temperature. Then, AC/DC voltage is applied to detect the potential causes of defect.


2. Pre-Laser (Hot/Cold)


In this process, electrical signals determine whether each chip on the wafer is functional or faulty. Repairable chips are stored for later processing. Thermal testing also takes place to catch defects that can occur at specific temperatures.


3. Laser Repair & Post-Laser 


Those same chips that were tagged for repairs in the previous process are then zapped by a laser beam to mend the discrepancies. Once the repair is complete, the chips are tested again in the post-laser process to ensure they were repaired properly.


4. Tape Laminate & Backgrinding


The tape laminate and backgrinding processes are required when assembling very thin products, such as IC cards that are used in transit cards or passports. The back side of the wafer is ground using a grinding wheel made up of fine diamond particles. This process files down the wafer, facilitating chip assembly. To protect the patterned surface of the wafer from dust and particles during the grinding process, a UV tape is laminated on the front surface of the wafer to create a protective layer. Once the grinding is complete, the tape is peeled off.


5. Inking 


The inking process, which we briefly touched on, allows the naked eye to easily distinguish defective chips by special ink marks that are made on the chips before and after the laser processes. Since the inked chips need not continue through the assembly and inspection processes, materials, equipment, time and manpower can be managed much more efficiently.


In the next episode, we’ll look into the packaging process, where our finished semiconductor chip is manipulated for protection from outside environments and maximum functionality. Stay tuned!

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